upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 275

• Manufacturer Part Number: upd78f0124hgba1-8et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

14.3 Registers Controlling Serial Interface UART6
(1) Asynchronous serial interface operation mode register 6 (ASIM6)
Address: FF50H After reset: 01H R/W
Serial interface UART6 is controlled by the following nine registers.
• Asynchronous serial interface operation mode register 6 (ASIM6)
• Asynchronous serial interface reception error status register 6 (ASIS6)
• Asynchronous serial interface transmission status register 6 (ASIF6)
• Clock selection register 6 (CKSR6)
• Baud rate generator control register 6 (BRGC6)
• Asynchronous serial interface control register 6 (ASICL6)
• Input switch control register (ISC)
• Port mode register 1 (PM1)
• Port register 1 (P1)
Notes 1.
Symbol
ASIM6
This 8-bit register controls the serial communication operations of serial interface UART6.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 01H.
Remark ASIM6 can be refreshed (the same value is written) by software during a communication operation
Figure 14-5. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (1/2)
2.
3.
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
POWER6
The output of the T
POWER6 = 0.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial
interface control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
Operation of the 8-bit counter output is enabled at the second base clock after 1 is written to the
POWER6 bit.
POWER6
TXE6
0
1
<7>
Note 1
Note 3
0
1
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Enables operation of the internal operation clock
Disables transmission (synchronously resets the transmission circuit).
Enables transmission
TXE6
<6>
X
D6 pin goes high and the input from the R
CHAPTER 14 SERIAL INTERFACE UART6
RXE6
<5>
User’s Manual U16962EJ3V0UD
Enables/disables operation of internal operation clock
Note 2
.
PS61
4
Enables/disables transmission
PS60
3
X
D6 pin is fixed to the high level when
CL6
2
SL6
1
ISRM6
0
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