upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 128

• Manufacturer Part Number: upd78f0124hgba1-8et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

<R>
128
Address FFBAH
Symbol
TMC00
Cautions 1. Timer operation must be stopped before writing to bits other than the OVF00 flag.
Remark TO00:
TMC003 TMC002 TMC001
OVF00
7
0
0
0
0
0
1
1
1
1
0
1
TI000:
TM00:
CR000: 16-bit timer capture/compare register 000
CR010: 16-bit timer capture/compare register 010
2. Set the valid edge of the TI000/P00 pin using prescaler mode register 00 (PRM00).
3. If any of the following modes: the mode in which clear & start occurs on match between
TM00 and CR000, the mode in which clear & start occurs at the valid edge of the TI000 pin or
free-running mode, is selected, when the set value of CR000 is FFFFH and the TM00 value
changes from FFFFH to 0000H, the OVF00 flag is set to 1.
Overflow not detected
Overflow detected
6
0
0
0
1
1
0
0
1
1
Figure 6-5. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
16-bit timer/event counter 00 output pin
16-bit timer/event counter 00 input pin
16-bit timer counter 00
After reset: 00H
0
1
0
1
0
1
0
1
5
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Operation stop
(TM00 cleared to 0)
Free-running mode
Clear & start occurs on TI000
pin valid edge
Clear & start occurs on match
between TM00 and CR000
Operating mode and clear
4
0
mode selection
TMC003 TMC002 TMC001 OVF00
User’s Manual U16962EJ3V0UD
16-bit timer counter 00 (TM00) overflow detection
R/W
3
2
No change
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between
TM00 and CR010 or TI000
pin valid edge
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between
TM00 and CR010 or TI000
pin valid edge
1
TO00 inversion timing
<0>
selection
−
Not generated
<When used as compare
register>
Generated on match
between TM00 and CR000,
or match between TM00
and CR010
<When used as capture
register>
Generated by inputting
CR000 capture trigger
Interrupt request
generation