si3200-x-gs Silicon Laboratories, si3200-x-gs Datasheet - Page 28

• Manufacturer Part Number: si3200-x-gs
• Description: Dual Programmable Cmos Slic With Line Monitoring
• Manufacturer: Silicon Laboratories

Si3232
To provide optimal reliability, the device automatically
transitions into the open state until the user changes the
state manually, independent of whether or not the power
alarm interrupt has been masked. The PQ1E to PQ6E
bits of the IRQEN3 register are used to enable the
interrupts for each transistor power alarm, and the
PQ1S to PQ6S bits of the IRQVEC3 register are set
when a power alarm is triggered in the respective
transistor. When using the Si3200, the PQ1E bit is used
to enable the power alarm interrupt, and the PQ1S bit is
set when a Si3200 power alarm is triggered.
4.4.8. Power Dissipation Considerations
The Si3232 relies on the Si3200 to power the line from
the battery supply. The PCB layout and enclosure
conditions should be designed to allow sufficient
thermal
programmable power alarm threshold ensures product
28
Si3200 Power Output Monitor
Si3200 Power Alarm Interrupt Pending
Si3200 Power Alarm Interrupt Enable
Q1/Q2 Power Alarm Threshold (discrete)
Q1/Q2 Power Alarm Threshold (Si3200)
Q3/Q4 Power Alarm Threshold
Q5/Q6 Power Alarm Threshold
Q1/Q2 Thermal LPF Pole
Q3/Q4 Thermal LPF Pole
Q5/Q6 Thermal LPF Pole
Q1–Q6 Power Alarm Interrupt Pending
Q71–Q6 Power Alarm Interrupt Enable
Table 16. Register and RAM Locations used for Power Monitoring and Power Fault Detection
The total power threshold is exceeded (when using
the power calculator method along with the Si3200).
dissipation
Parameter
out
of
the
Si3200,
Preliminary Rev. 0.96
IRQVEC3
IRQVEC3
Location
IRQEN3
IRQEN3
PLPF12
PLPF34
PLPF56
and
PTH12
PTH34
PTH56
PSUM
a
safety under all operating conditions. See “4.4.3. Power
Monitoring and Power Fault Detection” for more details
on power alarm considerations. The Si3200’s thermally-
enhanced SOIC-16 package offers an exposed pad that
improves thermal dissipation out of the package when
soldered to a topside PCB pad connected to inner
power planes. Using appropriate layout practices, the
Si3200 can provide thermal performance of 55 °C/W.
The exposed path should be connected to a low-
impedance ground plane via a topside PCB pad directly
under the part. See package outlines for PCB pad
dimensions. In addition, an opposite-side PCB pad with
multiple vias connecting it to the topside pad directly
under the exposed pad further improves the overall
thermal performance of the system. Refer to “AN55:
Dual ProSLIC™ User Guide” or the Si3232 evaluation
board data sheet for layout guidelines for optimal
thermal dissipation.
Register/RAM
PLPF12[15:3]
PLPF34[15:3]
PLPF56[15:3]
PTH34[15:0]
PTH12[15:0]
PTH56[15:0]
PSUM[15:0]
PQ1S
PQ1E
Bits
Measurement
0 to 16.319 W
0 to 16.319 W
0 to 34.72 W
0 to 34.72 W
See “4.4.6. Power Filter and
See “4.4.6. Power Filter and
See “4.4.6. Power Filter and
0 to 1.03 W
Range
TBD
TBD
N/A
N/A
Alarms”
Alarms”
Alarms”
Resolution
1059.6 µW
1059.6 µW
31.4 µW
498 µW
498 µW
N/A
N/A
N/A
N/A