si3200-x-gs Silicon Laboratories, si3200-x-gs Datasheet - Page 55

• Manufacturer Part Number: si3200-x-gs
• Description: Dual Programmable Cmos Slic With Line Monitoring
• Manufacturer: Silicon Laboratories

Figures 29 and 30 illustrate WRITE and READ operations to registers via an 8-bit SPI controller. These operations
are each performed as a 3-byte transfer. CS is asserted between each byte. It is necessary for CS to be asserted
before the first falling edge of SCLK after the DATA byte to indicate to the state machine that only one byte should
be transferred. The state of SDI is a “don’t care” during the DATA byte of a read operation.
Figures 31 and 32 illustrate WRITE and READ operation to registers via a 16-bit SPI controller. These operations
require a 4-byte transfer arranged as two 16-bit words. The absence of CS going high after the eighth bit of data
indicates to the SPI state machine that eight more SCLK pulses will follow to complete the operation. In the case of
a WRITE operation, the last eight bits are ignored. In the case of a read operation, the 8-bit data value is repeated
so that the data can be captured during the last half of a data transfer if so desired by the controller.
During register accesses, the CONTROL, ADDRESS, and DATA are captured in the SPI module. At the completion
of the ADDRESS byte of a READ access, the contents of the addressed register are moved into the data register in
the SPI. At the completion of the DATA byte of a WRITE access, the data is transferred from the SPI to the
addressed register location.
CS
SCLK
SDI
SDO
CS
SCLK
SDI
SDO
CS
SCLK
SDI
SDO
CONTROL
Figure 30. Register Read Operation via an 8-Bit SPI Port
Figure 31. Register Write Operation via a 16-Bit SPI Port
Figure 32. Register Read Operation via a 16-Bit SPI Port
CONTROL
CONTROL
ADDRESS
ADDRESS
Preliminary Rev. 0.96
ADDRESS
Data [7:0]
X X X X X X X X
Data [7:0]
Same byte repeated twice.
X X X X X X X X
X X X X X X X X
Data [7:0]
X X X X X X X X
Data [7:0]
Si3232
Hi - Z
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