si3200-x-gs Silicon Laboratories, si3200-x-gs Datasheet - Page 63

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si3200-x-gs

Manufacturer Part Number
si3200-x-gs
Description
Dual Programmable Cmos Slic With Line Monitoring
Manufacturer
Silicon Laboratories
Datasheet
6. 8-Bit Control Descriptions
AUDGAIN: Audio Gain Control (Register Address 21)
(Register type: Initialization)
Reset settings = 0x00
Name
Type
Bit
1:0
7
6
5
4
3
2
ARXMUTE
CMTXSEL
ATXMUTE
Reserved
Reserved
ARX[1:0]
Name
CMTXSEL
ATX
R/W
D7
Transmit Path Common Mode Select.
Selects common mode reference for transmit audio signal.
0 = VTXP/N pins will be referred to internal 1.5 V VCM level.
1 = VTXP/N pins will be referred to external common-mode level presented at the VCM pin.
Analog Transmit Path Mute.
0 = Transmit signal passed.
1 = Transmit signal muted.
Read returns zero.
Analog Transmit Path Attenuation Stage.
Selects analog transmit path attenuation. See "4.14. Audio Path Processing" on page 48.
0 = No attenuation.
1 = –3 dB attenuation.
Read returns zero.
Analog Receive Path Mute.
0 = Receive signal passed.
1 = Receive signal muted.
Analog Receive Path Attenuation Stage.
Selects analog receive path attenuation. See “4.14. Audio Path Processing” .
00 = No attenuation.
01 = –3 dB attenuation.
10 = –6 dB attenuation.
11 = Reserved. Do not use.
ATXMUTE
R/W
D6
D5
Preliminary Rev. 0.96
ATX
R/W
D4
Function
D3
ARXMUTE
R/W
D2
D1
ARX[1:0]
R/W
Si3232
D0
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