fs6131 AMI Semiconductor, Inc., fs6131 Datasheet - Page 40

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fs6131

Manufacturer Part Number
fs6131
Description
Fs6131-01g Programmable Line Lock Clock Generator Ic
Manufacturer
AMI Semiconductor, Inc.
Datasheet

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FS6131-01/FS6131-01g Programmable Line Lock Clock Generator IC
The output clock frequency is calculated as
For best performance, program the post divider (N
70MHz but less than 230MHz. The VCO frequency (f
Selecting the post divider modulus of N
to avoid divider values from becoming too large. The settings place the VCO frequency at about 72MHz.
Calculate the ideal charge pump current (I
where R
either
See Table 15 for more information on the VCO range. With f
the charge pump current is 24mA. A 220pF cap across the entire loop filter is also helpful.
14.2 Example Programming
To generate 800 pixel clocks between HSYNC pulses occurring on the line reference signal every 15kHz, program the following (refer
to Figure 27):
• Clear the OSCTYPE bit to 0
• Turn off the crystal oscillator via XLROM=7
• Set the PFD inputs to select the REF and FBK pins via PDREF=1 and PDFBK=1
• Set N
• Select the external loop filter via EXTLF=1
• Set XLVTEN=0 and XLPDEN=1 to disable the VCXO fine tune and the crystal loop phase frequency detector
• Set VCOSPD=1 to select the VCO low speed range
• Set MLCP[1:0] to 3 to select the 32mA range
The output clock frequency f
application.
AMI Semiconductor
www.amis.com
P1
lf
=2, N
A
A
is the external loop filter series resistor, C
VCO
VCO
=125MHz/V if the high range is selected, or
=75MHz/V if the low range is selected.
P2
=3 and N
Specifications subject to change without notice
– Rev. 3.0, Jan. 08
P3
=1 for a combined post divider modulus of N
CLK
is 12MHz, with an internal VCO frequency of 72MHz. Note that the crystal loop was unused in this
Px
=6 is a reasonable solution, although there are a number of values that will work. Try to keep
pump
) as
f
CLK
lf
I
is the external loop filter series capacitor and A
Px
pump
VCO
) modulus to allow the VCO to operate at a nominal frequency that is at least
=
) can be calculated by
15
=
N
f
kHz
VCO
F
15
f
hsync
×
HSYNC
kHz
N
40
=
=15kHz, C
×
Px
800
f
CLK
<
×
Px
5000
=6 via POST1[1:0], POST2[1:0] and POST3[1:0].
R
N
=
2
lf
2
Px
N
12
C
lf
=0.015mF, R
F
lf
0 .
N
A
MHz
VCO
Px
lf
=15kW, N
VCO
F
=800, N
is the VCO gain. The VCO gain is
Px
=6, and A
VCO
=125MHz/V,
Data Sheet

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