s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 264
s908ab32ag0cfue
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s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908AB32AG0CFUE.pdf
(392 pages)
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Serial Communications Interface
15.9.2 SCI Control Register 2
Technical Data
264
NOTE:
PTY — Parity Bit
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
SCI control register 2:
This read/write bit determines whether the SCI generates and checks
for odd parity or even parity. (See
bit.
•
M
0
1
0
0
1
1
Serial Communications Interface Module (SCI)
Control Bits
1 = Odd parity
0 = Even parity
Enables the following CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt
– Enables the TC bit to generate transmitter CPU interrupt
– Enables the SCRF bit to generate receiver CPU interrupt
– Enables the IDLE bit to generate receiver CPU interrupt
requests
requests
requests
requests
PEN and
PTY
0X
0X
10
11
10
11
Table 15-5. Character Format Selection
Start
Bits
1
1
1
1
1
1
Data
Bits
8
9
7
7
8
8
Table
Character Format
Parity
None
None
Even
Even
Odd
Odd
15-5.) Reset clears the PTY
MC68HC908AB32
Freescale Semiconductor
Stop
Bits
1
1
1
1
1
1
Character
Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
—
Rev. 1.1
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