pcf2127a NXP Semiconductors, pcf2127a Datasheet
pcf2127a
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pcf2127a Summary of contents
Page 1
... The PCF2127A is a CMOS Compensated Crystal Oscillator (TCXO) and a 32.768 kHz quartz crystal optimized for very high accuracy and very low power consumption. The PCF2127A has 512 bytes of general purpose static RAM, a selectable I switch-over circuit, a programmable watchdog function, a timestamp function, and many other features ...
Page 2
... Timekeeping instruments with high precision GPS equipment to reduce time to first fix Applications that require an accurate process timing Products with long automated unattended operation time 4. Ordering information Table 1. Type number Package PCF2127AT/1 SO20 5. Marking Table 2. Type number PCF2127AT/1 PCF2127A_1 Product data sheet ...
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... OSCILLATOR MONITOR RST INTERFACE SDA/CE SERIAL BUS SDO INTERFACE SDI SELECTOR SCL IFS INTERFACE TS PFI 1.25 V (internal) PFO Fig 1. Block diagram of PCF2127A PCF2127A_1 Product data sheet TCXO OSCI 32.768 kHz OSCO TEMP internal power supply RESET SPI-BUS PCF2127A 2 I C-BUS SCL SDO ...
Page 4
... CLKOUT n.c. n.c. 10 Top view. For mechanical details, see Pin configuration for PCF2127A (SO20) Pin description of PCF2127A Pin Description 1 combined serial clock input for both I float when CE inactive 2 serial data input for SPI-bus; may float when CE inactive 3 serial data output for SPI-bus, push-pull ...
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... The PCF2127A contains 30 8-bit registers, that are used for many different functions, such as clock, alarm, watchdog, timer, timestamp etc. (see The PCF2127A has an output reset pin: the output reset is activated on Power-On Reset (POR), and whenever the oscillator is stopped (see The PCF2127A features 512 bytes of general purpose static RAM, which is battery ...
Page 6
... Handling address registers Section 8.9.8). Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Table 9). CLKOUT frequencies of 001aaj307 © NXP B.V. 2010. All rights reserved ...
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... MINUTE_TIMESTP (0 to 59) - AMPM HOUR_TIMESTP ( mode HOUR_TIMESTP ( mode - DAY_TIMESTP ( MONTH_TIMESTP ( AO[3:0] Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 12_24 MI SI TSIE AIE CDTIE BLF BIE BLIE WEEKDAYS ( WEEKDAY_ALARM ( XXX ...
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... X PCF2127A_1 Product data sheet Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal RA8 © NXP B.V. 2010. All rights reserved. Reset value - - - - - - - 0 0000 0000 XXXX XXXX XXXX XXXX ...
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... NXP Semiconductors 8.2 Control registers PCF2127A has 30 8-bit registers. The first 3 registers with the addresses 00h, 01h and 02h are used as control registers. 8.2.1 Register Control_1 Table 5. Bit [1] Default value. [2] When writing to the register this bit has always to be set logic 0. ...
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... CDTIE 0 no interrupt generated from countdown timer flag 1 interrupt generated when countdown timer flag set Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Reference Section 8.13 Section 8.13.3 Section 8.12.1 Section 8.10.6 Section 8.11.6 Section 8.13.5 Section 8.13.4 Section 8.13.1.2 © ...
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... BF is set [2] BLIE 0 no interrupt generated from battery low flag (BLF) 1 interrupt generated when BLF is set Table 17. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Reference Section 8.6 Section 8.12.4 Section 8.6.1 Section 8.6.3 Section 8.13.6 Section 8.13.7 © NXP B.V. 2010. All rights reserved ...
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... COF[2:0] 8.3.1 Temperature compensated crystal oscillator The frequency of tuning fork quartz crystal oscillators are temperature-dependent. In the PCF2127A the frequency drift caused by temperature variation is corrected by adjusting the load capacitance of the crystal oscillator. The load capacitance is changed by switching between two load capacitance values using a modulation signal with a programmable duty cycle ...
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... Product data sheet CLKOUT frequency selection CLKOUT frequency (Hz) 32768 16384 8192 4096 2048 1024 1 CLKOUT = high-Z Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal [1] Typical duty cycle © NXP B.V. 2010. All rights reserved. ...
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... Symbol AO[3:0] 8.4.1 Crystal aging correction The PCF2127A has an aging offset register Aging_offset to correct the crystal aging 2 effects The accuracy of the frequency of a quartz crystal depends on the aging. Crystal suppliers usually specify the first year aging (typically ±1 ppm, maximum ±3 ppm) and/or the 10 years aging (typically ± ...
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... NXP Semiconductors 8.5 General purpose 512 bytes static RAM The PCF2127A contains a general purpose 512 bytes static RAM. This integrated SRAM is battery backed and can therefore be used to store data which is essential for the application to survive a power outage. 9 bits, RA[8:0], define the RAM address pointer in registers RAM_addr_MSB and RAM_addr_LSB ...
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... Send RAM read command: – Select register RAM_rd_cmd (send address 1Dh). 3. Read from the RAM: – Read n data byte from the RAM. For details see 8.6 Power management functions The PCF2127A has two power supply pins and one power output pin: • • V BAT • ...
Page 17
... Default value. [2] When the battery switch-over function is disabled, the PCF2127A works only with the power supply V V BAT 8.6.1 Battery switch-over function The PCF2127A has a backup battery switch-over circuit which monitors the main power supply V condition is detected. One of two operation modes can be selected: • ...
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... BBS BAT BF INT Battery switch-over behavior in standard mode with bit BIE logic 1 (enabled) the internal power supply is V BAT the internal power supply is V BAT Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal . DD . BAT internal power supply (= V ) BBS . ...
Page 19
... Battery switch-over behavior in direct switching mode with bit BIE logic 1 (enabled) ≥ 3.0 V). In direct switching mode the power consumption BAT pin must be connected to ground BAT Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal internal power supply (= V ) BBS is higher than V DD and V ...
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... Battery switch-over circuit, simplified block diagram voltage on the output pin BBS is equal to the internal power supply and depends Output pin BBS Ref. 3 “AN10857”). For this case, is driven from V . BBS DD Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal logic switches V DD(int DD(int) ...
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... NXP Semiconductors V BBS (mV) Fig 7. 8.6.3 Battery low detection function The PCF2127A has a battery low detection circuit which monitors the status of the battery V . BAT When V (register Control_3) is set to indicate that the battery is low and that it must be replaced. Monitoring of the battery voltage also occurs during battery operation. ...
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... V) Fig 8. 8.6.4 Extra power fail detection function The PCF2127A has an extra power fail detection circuit which compares the voltage at the power fail input pin (PFI internal reference voltage equal to 1. < 1.25 V the power fail output PFO is driven LOW. PFO is an open-drain, active PFI LOW output which requires an external pull-up resistor in any application ...
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... Figure DD BAT internal power supply (= V V BBS V > th(uvp) BAT th(sw)bat Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal , the power fail BAT , the pin PFO is not driven LOW DD 11. ) BBS V BBS comparator disabled t = [15.63 : 31.25] ms rec ...
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... V BAT mode and V < V th(uvp) BAT > 1.25 V, PFO = HIGH (through the external pull-up resistor) PFI < 1.25 V, PFO = LOW PFI DD Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal ) BBS comparator disabled comparator always enabled V BBS comparator enabled t ...
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... NXP Semiconductors 8.7 Reset function The PCF2127A has an active LOW open-drain output reset pin (RST). The reset output is activated at Power-On Reset (POR) and whenever the oscillator is stopped (see Section 8.7.1 Power-On Reset (POR) The POR is active whenever the oscillator is stopped. The oscillator is also considered to ...
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... OVERRIDE SDA/CE CLEAR POR_OVRD Figure 15. All timings shown are required minimums. power SCL Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal osc stopped 0 = stopped running reset 0 = override inactive 1 = override active 0 = clear override mode 1 = override possible 001aaj324 minimum 500 ns ...
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... NXP Semiconductors 8.8 Oscillator stop detection function The PCF2127A has an on-chip oscillator detection circuit which monitors the status of the oscillation: whenever the oscillation stops, a reset occurs and the oscillator stop flag OSF (in register Seconds) is set logic 1. • Power-on: a. The oscillator is not running, the chip is in reset (pin RST is LOW and flag OSF is logic 1) ...
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... Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal clock integrity is guaranteed clock integrity is not guaranteed: oscillator has stopped and chip reset has occurred since flag was last cleared actual seconds coded in BCD format ...
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... Register Weekdays Table 24. Bit Symbol WEEKDAYS Although the association of the weekdays counter to the actual weekday is arbitrary, the PCF2127A will assume Sunday is 000 and Monday is 001 for the purposes of determining the increment for calendar weeks. Table 25. [1] Day Sunday Monday ...
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... Years - years register (address 09h) bit description Value Place value Description ten’s place unit place Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal unused actual month coded in BCD format, see Table 27 Bit 2 Bit ...
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... Hz clock tick. 12_24 hour mode LEAP YEAR CALCULATION Figure 18). SLAVE ADDRESS START Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 1 Hz tick SECONDS MINUTES HOURS DAYS WEEKDAY MONTHS ...
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... HOUR ALARM = HOUR TIME AE_D DAY ALARM = DAY TIME AE_W WEEKDAY ALARM = WEEKDAY TIME Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Figure example AE_S = (1) set alarm flag AF 013aaa236 Section 8.13.4. © NXP B.V. 2010. All rights reserved. ...
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... Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal second alarm is enabled second alarm is disabled second alarm information coded in BCD format minute alarm is enabled minute alarm is disabled minute alarm information coded in BCD ...
Page 34
... AF INT when AIE = 1 Example where only the minute alarm is used and no other interrupts are enabled. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal day alarm is enabled day alarm is disabled unused day alarm information coded in BCD ...
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... NXP Semiconductors 8.11 Timer functions The PCF2127A has two different timer functions, a watchdog timer and a countdown timer. The timers can be selected by using the control bits WD_CD[1:0] in the register Watchdg_tim_ctl. • The watchdog timer has four selectable source clocks. It can be used to detect a microprocessor with interrupt and reset capability which is out of control (see Section • ...
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... Hz 15.625 ⁄ Table 34). 35) determines the watchdog timer period. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Description -------------------------------------------------------------- - CountdownPeriod = SourceClockFrequency where n is the countdown value Units Maximum timer period (n = 255) μs 62.256 ms 3.984 s ...
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... Specification of t w(rst) TF[1:0] t 244 μ 15.625 ms 10 15.625 ms 11 15.625 INT Counter reached 1, WDTF is set logic 1, an interrupt is generated. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal w(rst) MCU n 001aag062 © NXP B.V. 2010. All rights reserved ...
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... WD/CD [1: CDTF INT In this example it is assumed that the countdown timer flag (CDTF) is cleared before the next countdown period expires and that INT is set to pulsed mode. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal ...
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... Pre-defined timers: second and minute interrupt PCF2127A has two pre-defined timers which are used to generate an interrupt either once per second or once per minute. The pulse generator for the minute or second interrupt operates from an internal 64 Hz clock ...
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... Example to clear only MSF (bit 7) in register Control_2 Bit Example to clear both CDTF and MSF in register Control_2 Bit Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal CDTF - - ...
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... NXP Semiconductors 8.12 Timestamp function The PCF2127A has an active LOW timestamp input pin TS, internally pulled with an on-chip pull-up resistor to the internal power supply of the device. It also has a timestamp detection circuit which can detect two different events input on the pin is driven to an intermediate level between the power supply and ground ...
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... Value Place value Description - - ten’s place unit place Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 8.12.4. unused second timestamp information coded in BCD format unused minute timestamp information coded in BCD format © NXP B.V. 2010. All rights reserved. ...
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... Year_timestp - year timestamp register (address 18h) bit description Value Place value Description ten’s place unit place Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal unused indicates AM indicates PM hour timestamp information coded in BCD format when in 12 hour mode hour timestamp information coded in BCD ...
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... The timestamp function depends on the control bit BTSE in register Control_3: Table 52. BTSE [1] Default value. 8.13 Interrupt output, INT PCF2127A has an interrupt output pin INT which is open-drain, active LOW. Interrupts may be sourced from different places: • second or minute timer • countdown timer • watchdog timer • ...
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... FLAG SET CLEAR to interface: BF: BATTERY read BF FLAG SET CLEAR to interface: BLF: BATTERY read BLF LOW FLAG SET CLEAR Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal SI/ TI_TP INT pin CDTIE 0 1 WD_CD[1: AIE TSIE BIE BLIE 001aag070 © ...
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... INT when SI enabled MSF when SI enabled In this example, bit TI_TP is logic 1 and the MSF flag is not cleared after an interrupt. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Result on MSF MSF never set MSF set when minutes counter increments ...
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... INT operation (bit TI_TP = 1) INT period (s) [ ⁄ 1 8192 ⁄ 1 128 ⁄ ⁄ Figure 28 Section Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal > 1 ⁄ 1 4096 ⁄ ⁄ ⁄ ...
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... The timing shown for clearing CDTF is also valid for the non-pulsed interrupt mode, i.e. when TI_TP is logic 0, where the INT pulse may be shortened by setting CDTIE logic 0. 8.11.6. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 8th clock CLEAR INSTRUCTION 001aaf908 ...
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... AF INT SCL instruction Example where only the minute alarm is used and no other interrupts are enabled. Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 8th clock CLEAR INSTRUCTION 001aaf910 © NXP B.V. 2010. All rights reserved ...
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... Read time registers to see the second change. Repeat 7 and 8 for additional increments. PCF2127A_1 Product data sheet 6 divider chain called prescaler (see prescaler in Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Table 55). The prescaler can © NXP B.V. 2010. All rights reserved ...
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... Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal held in reset and thus ticks are not reset and because the I 8 Comment prescaler counting normally prescaler is reset; time circuits are frozen prescaler is reset; time circuits are frozen ...
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... Hz stop released Rev. 01 — 21 January 2010 Integrated RTC, TCXO and quartz crystal UPPER PRESCALER RES RES 15.625 ms 001aaj343 PCF2127A tick RES RES stop 001aaj342 © NXP B.V. 2010. All rights reserved ...
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... NXP Semiconductors 9. Interfaces The PCF2127A has a selectable I the interface selection pin IFS (see Table 56. Pin IFS V DD SCL SDI SDO CE SCL 1 SDI 2 SDO 3 SDA/CE 4 IFS 5 PCF2127A select the SPI-bus interface, pin IFS has to be connected to pin V ...
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... LOW serial clock input serial data input serial data output Figure 35). data bus COMMAND DATA CE Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Table Figure 34). SDI SDO single wire mode 001aai560 Description when HIGH, the interface is reset; ...
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... Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Description data read or write selection write data read data subaddress; other codes will cause the device to ignore data transfer minutes data 10 BCD BCD b2 b1 ...
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... Product data sheet Figure SDA SCL data line stable; data valid Figure 39). S START condition Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 38). change of data allowed mbc621 P STOP condition © NXP B.V. 2010. All rights reserved. SDA SCL mbc622 ...
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... SCL MASTER TRANSMITTER RECEIVER Fig 40. System configuration The PCF2127A can act as a slave transmitter and a slave receiver. 9.2.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle. ...
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... NXP Semiconductors 2 9.2.5 I C-bus protocol After a start condition a valid hardware address has to be sent to a PCF2127A device. The appropriate I is shown in Table 59. Bit The R/W bit defines the direction of the following single or multiple byte data transfer (read is logic 1, write is logic 0). For the format and the timing of the START condition (S), the STOP condition (P), and the ...
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... Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal acknowledge from PCF2127A register address 1Ah A acknowledge from PCF2127A data byte 1Bh A acknowledge from PCF2127A register address 1Ch A P © NXP B.V. 2010. All rights reserved. set RAM ...
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... A Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal acknowledge from PCF2127A register address 1Ah A acknowledge from PCF2127A data byte 1Bh A acknowledge from PCF2127A register address 1Dh A acknowledge from master data byte ...
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... NXP Semiconductors 10. Internal circuitry Fig 46. Device diode protection diagram of PCF2127A PCF2127A_1 Product data sheet Integrated RTC, TCXO and quartz crystal SCL SDI SDO SDA/CE IFS TS CLKOUT V SS PCF2127A 001aaj677 Rev. 01 — 21 January 2010 PCF2127A BAT BBS INT RST PFI PFO TEST © ...
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... HBM voltage MM CDM latch-up current storage temperature Ref. 10 “JESD78” Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Min −0.5 −50 −0.5 −10 −0.5 −10 −10 −0.5 - −40 ...
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... 4 CLKOUT enabled at 32 kHz (default); power management functions enabled (default), timestamp detection enabled (default active 3.0 V BAT Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Min Typ Max [1] 1.8 - 4.2 1.8 - 4 800 - - 200 - - 200 ...
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... SDO pin SDA on all other outputs output source current; on pin SDO 3 0.3 V. DD(po)min DD(min) DD Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Min Typ - 2.5 - 2.5 - 1.25 −0 0. − −0.5 - − ...
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... I DD 1.6 1.2 0.8 0.4 0 −40 −20 0 CLKOUT disabled; PWRMNG[2:0] = 111; TSOFF = 1; TS input floating function of temperature DD Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Temperature (°C) 001aaj432 100 © NXP B.V. 2010. All rights reserved. ...
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... I DD 3.2 2.4 1.6 0.8 0 1.8 2.2 2 function Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 001aaj433 CLKOUT enabled at 32 kHz CLKOUT OFF 3.0 3.4 3 °C; TS input floating. amb 001aaj434 CLKOUT enabled at 32 kHz CLKOUT OFF 3.0 3.4 3 °C; TS input floating. amb © ...
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... 3 BAT on pin CLKOUT Ref ± 10 ppm 0 (1) −40 (2) −80 −40 −20 0 Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Min Typ - 32.768 - ±3 [1] - ±5 [ ±1 - “AN10857”). ± 5 ppm ± 10 ppm ...
Page 68
... SDI data hold time for SDI data register read access RAM read access [1] to avoid bus conflict Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal and V with an input voltage swing 1 4.2 V ...
Page 69
... READ SDI b7 high-Z SDO Fig 50. SPI-bus timing PCF2127A_1 Product data sheet t w(CE_N 80% 20% RA0 t(SDI-SDO) Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal t t clk(SCL) h(CE_N) t clk(L) t clk( d(R)SDO rec(CE_N dis(SDO) b0 013aaa152 © ...
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... Min [1] 0 100 0 4.7 - 1.3 4.0 - 0.6 250 - 100 4.7 - 1.3 4.0 - 0.6 4.0 - 0.6 4.7 - 0.6 [2][3][4] - 1000 20 + 0.1C [2][3][4] - 300 20 + 0.1C [5] 0.1 3.45 0.1 [6] 300 - 75 [ Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal Fast-mode Plus (Fm+) Unit Max Min Max 400 0 1000 - 0.26 - 300 - 120 b 300 - 120 b 0.9 0.05 0. 450 the SCL signal) in order 250 ns ...
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... BIT 7 BIT 6 MSB (A6) (A7) t LOW t HIGH SCL SU;DAT HD;DAT Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal BIT 0 ACKNOWLEDGE STOP LSB (A) CONDITION (R/W) (P) t VD;DAT Ref. 3 “AN10857”. © NXP B.V. 2010. All rights reserved. t SU;STO ...
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... 0.49 0.32 13.0 7.6 10.65 1.27 0.36 0.23 12.6 7.4 10.00 0.019 0.013 0.51 0.30 0.419 0.05 0.014 0.009 0.49 0.29 0.394 REFERENCES JEDEC JEITA MS-013 Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal θ detail 1.1 1.1 1.4 0.25 0.25 0.4 1.0 0.043 0.043 0.055 ...
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... Resistance-Capacitance Real Time Clock Serial Clock Line Serial DAta line Serial Peripheral Interface Static Random Access Memory Temperature Compensated Crystal Oscillator Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal “AN10857”. © NXP B.V. 2010. All rights reserved ...
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... References [1] AN10365 — Surface mount reflow soldering description [2] AN10853 — Handling precautions of ESD sensitive devices [3] AN10857 — Application and soldering information for PCF2127A and PCF2129A TCXO RTC [4] IEC 60134 — Rating systems for electronic tubes and valves and analogous semiconductor devices [5] IEC 61340-5 — ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal © NXP B.V. 2010. All rights reserved ...
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... NXP Semiconductors 22. Tables Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Table 2. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 3. Pin description of PCF2127A . . . . . . . . . . . . . .4 Table 4. Register overview . . . . . . . . . . . . . . . . . . . . . . .7 Table 5. Control_1 - control and status register 1 (address 00h) bit description . . . . . . . . . . . . . . .9 Table 6. Control_2 - control and status register 2 (address 01h) bit description . . . . . . . . . . . . . .10 Table 7. Control_3 - control and status register 3 (address 0Fh) bit description ...
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... Fig 49. Characteristic of frequency with respect to Fig 50. SPI-bus timing Fig 51. I Fig 52. Package outline SOT163-1 (SO20 Rev. 01 — 21 January 2010 PCF2127A Integrated RTC, TCXO and quartz crystal 2 C-bus PCF2127A function of temperature . . . . . . . . . . . . . function temperature C-bus timing diagram; rise and fall times refer and © ...
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... Interrupt output, INT 8.13.1 Minute, second and countdown timer interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 8.13.1.1 Minute and second interrupts 8.13.1.2 Countdown timer interrupts . . . . . . . . . . . . . . 47 8.13.2 INT pulse shortening . . . . . . . . . . . . . . . . . . . 47 8.13.3 Watchdog timer interrupts . . . . . . . . . . . . . . . 48 8.13.4 Alarm interrupts . . . . . . . . . . . . . . . . . . . . . . . 48 8.13.5 Timestamp interrupts . . . . . . . . . . . . . . . . . . . 49 8.13.6 Battery switch-over interrupts . . . . . . . . . . . . 49 Rev. 01 — 21 January 2010 PCF2127A continued >> © NXP B.V. 2010. All rights reserved ...
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... NXP B.V. 2010. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PCF2127A Integrated RTC, TCXO and quartz crystal All rights reserved. Date of release: 21 January 2010 Document identifier: PCF2127A_1 ...