pcf2127a NXP Semiconductors, pcf2127a Datasheet - Page 49
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pcf2127a
Manufacturer Part Number
pcf2127a
Description
Integrated Rtc, Tcxo And Quartz Crystal
Manufacturer
NXP Semiconductors
Datasheet
1.PCF2127A.pdf
(79 pages)
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NXP Semiconductors
PCF2127A_1
Product data sheet
8.13.5 Timestamp interrupts
8.13.6 Battery switch-over interrupts
8.13.7 Battery low detection interrupts
Interrupt generation from the timestamp function is controlled using the TSIE bit (register
Control_2). If TSIE is enabled the INT pin follows the status of the flags TSFx. Clearing
the flags TSFx immediately clears INT. No pulse generation is possible for timestamp
interrupts.
Generation of interrupts from the battery switch-over is controlled via the BIE bit (register
Control_3). If BIE is enabled, the INT pin follows the status of bit BF (register Control_3).
Clearing BF immediately clears INT. No pulse generation is possible for battery
switch-over interrupts.
Generation of interrupts from the battery low detection is controlled via the BLIE bit
(register Control_3). If BLIE is enabled the INT pin will follow the status of bit BLF (register
Control_3). The interrupt is cleared when the battery is replaced (BLF is logic 0) or when
bit BLIE is disabled (BLIE is logic 0). BLF is read only and therefore cannot be cleared via
the interface.
Fig 30. AF timing diagram
Example where only the minute alarm is used and no other interrupts are enabled.
minute counter
minute alarm
instruction
Rev. 01 — 21 January 2010
SCL
INT
AF
44
45
45
CLEAR INSTRUCTION
Integrated RTC, TCXO and quartz crystal
8th clock
PCF2127A
001aaf910
© NXP B.V. 2010. All rights reserved.
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