adc1443d NXP Semiconductors, adc1443d Datasheet

adc1443d

Manufacturer Part Number

adc1443d

Description

Dual Channel 14-bit Adc; 125, 160 Or 200 Msps; Jesd204b-compliant Cgvxpress Serial Outputs

Manufacturer

NXP Semiconductors

Datasheet

1.ADC1443D.pdf (50 pages)

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1. General description

2. Features and benefits

The ADC1443D is a dual channel 14-bit Analog-to-Digital Converter (ADC) with

JESD204B-compliant CGVxpress interface optimized for high dynamic performance and

low power consumption at sample rates up to 200 Msps. Pipelined architecture and output

error correction ensure the ADC1443D is accurate enough to guarantee zero missing

codes over the entire operating range.

Supplied from a single 1.8 V source, the ADC1443D has serial outputs compliant with the

JESD204B standard over a configurable number of lanes (1 or 2). Multiple Device

Synchronization (MDS) allows sample-accurate synchronization of the data outputs of

multiple ADC devices. MDS, which is a unique feature of the CGV and CGVxpress

technology of NXP Semiconductors, guarantees a maximum skew of one clock period

between as many as 16 output lanes from up to eight ADC1443D devices.

An integrated Serial Peripheral Interface (SPI) allows easy configuration of the ADC. The

device also includes a programmable full-scale to allow a flexible input voltage range of

1 V (p-p) to 2 V (p-p).

With excellent dynamic performance from the baseband to input frequencies of up to

250 MHz or more, the ADC1443D is ideal for use in undersampled multi-carrier,

multi-standard communication system applications. Using a pipelined architecture, an

output error correction scheme ensures the ADC1443D is accurate enough to guarantee

zero missing codes over the entire operating range.

The ADC1443D200 is available in an HLQFN56 package (8 mm  8 mm outline). It is

supported with customer demo boards. This device is also available in a 12-bit resolution

variant with a choice of maximum sampling frequency (125, 160 or 200 Msps).



ADC1443D series

Dual channel 14-bit ADC; 125, 160 or 200 Msps;

JESD204B-compliant CGVxpress serial outputs

Rev. 1 — 28 September 2011

Dual channel 14-bit resolution ADC

Sampling rate up to 200 Msps

JESD204B Device Subclass 0, 1 and 2

compliant with harmonic clocking and

deterministic latency support

ADC Multiple Device Synchronization

(MDS), CGVxpress feature

Single 1.8 V supply



SNR = 72.5 dBFS (typical);

SFDR = 86 dBc (typical); f

IMD3 = 88 dBc (typical); f

Analog input bandwidth of 1 GHz

(typical)

Typical power dissipation = 1.0 W;

= 190 MHz

= 185 Msps; f

= 200 Msps

= 188.5 MHz; f

= 190 MHz

Objective data sheet

= 191.5 MHz

= 185 Msps;

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