adc1443d NXP Semiconductors, adc1443d Datasheet - Page 27

• Manufacturer Part Number: adc1443d
• Description: Dual Channel 14-bit Adc; 125, 160 Or 200 Msps; Jesd204b-compliant Cgvxpress Serial Outputs
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ADC1443D_SER
Objective data sheet
Fig 35. General overview of the JESD204A/JESD204B serializer
Fig 36. Detailed view of the JESD204A/JESD204B serializer with debug functionality
S samples per frame cycle
N bits from Cr
CS bits for control
SYNC~
CS bits for control
N bits from Cr
M CONVERTERS
N' = N+CS
ADC_PD
ADC_PD
DUMMY
DUMMY
ADC B
ADC A
PRBS
PRBS
AND
PLL
DLL
M−1
0
+
+
× 10F
× F
× 1
14 + 1
14 + 1
14 + 1
14 + 1
ADC_MODE[1:0]
ADC_MODE[1:0]
Mx(N'xS) bits
frame CLK
character CLK
bit CLK
10
11
11
10
00
00
lane stream mapping
samples stream to
TX transport layer
HD: frame boundary break
CF: position of control bits
Padding with Tail bits (TT)
14 + 1
14 + 1
AND
AND
CS
CS
ASSEMBLY
N
N
FRAME
N + CS
N + CS
L LANES
All information provided in this document is subject to legal disclaimers.
F octets
F octets
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Lx(F) octets
Rev. 1 — 28 September 2011
replication;
test mode)
assembly,
character
(frame
FSM
ILA,
OCTETS
OCTETS
FRAME
FRAME
TO
TO
L octets
sync_request
PRBS
PRBS
SCRAMBLER
SCRAMBLER
8
8
SCR_IN_MODE
SCR_IN_MODE
00
01
01
00
TX CONTROLLER
SCR
SCR
CHARACTER
GENERATOR
CHARACTER
GENERATOR
ALIGNMENT
ALIGNMENT
ADC1443D series
10-bit
10-bit
8-bit/
8-bit/
LANE_MODE[1:0]
LANE_MODE[1:0]
10
10
10-bit
10-bit
8-bit/
8-bit/
LANE_POL
LANE_POL
© NXP B.V. 2011. All rights reserved.
005aaa084
SER
SER
SER
SER
aaa-000423
LANE 0
LANE 1
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