adc1443d NXP Semiconductors, adc1443d Datasheet - Page 21

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adc1443d

Manufacturer Part Number
adc1443d
Description
Dual Channel 14-bit Adc; 125, 160 Or 200 Msps; Jesd204b-compliant Cgvxpress Serial Outputs
Manufacturer
NXP Semiconductors
Datasheet

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ADC1443D_SER
Objective data sheet
11.1.4 Programmable full-scale
11.1.5 Anti-kickback circuitry
The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)
by programming internal reference gain between 0 dB and 6 dB in 1 dB steps. The
full-scale range can be set independently via bits INTREF[2:0] of the SPI local registers
(see
Table 10.
Default values are shown highlighted.
An anti-kickback circuitry (RC-filter in
charge injection generated by the sampling capacitance.
The RC-filter is also used to filter noise from the signal before it reaches the sampling
stage. It is recommended that the capacitor has a value that maximizes noise attenuation
without degrading the settling time excessively.
INTREF[2:0]
000
001
010
011
100
101
110
111
Fig 25. Equivalent schematic of the common-mode reference circuit
Table 10
0.1 μF
Reference gain control
VCM
and
All information provided in this document is subject to legal disclaimers.
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Table
Rev. 1 — 28 September 2011
PACKAGE
24).
Level (dB)
0
1
2
3
4
5
6
reserved
ESD
Figure
PARASITICS
26) is required to counteract the effects of the
ADC1443D series
COMMON MODE
REFERENCE
Full-scale (V (p-p))
2
1.78
1.59
1.42
1.26
1.12
1
x
ADC CORE
© NXP B.V. 2011. All rights reserved.
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