adc1443d NXP Semiconductors, adc1443d Datasheet - Page 24
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adc1443d
Manufacturer Part Number
adc1443d
Description
Dual Channel 14-bit Adc; 125, 160 Or 200 Msps; Jesd204b-compliant Cgvxpress Serial Outputs
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1443D.pdf
(50 pages)
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NXP Semiconductors
ADC1443D_SER
Objective data sheet
Single-ended or differential clock inputs can be selected via bit DIFF_SE of SPI. If
single-ended is enabled, the input pin (pin CLKM or pin CLKP) is selected using control bit
SE_SEL (see
Fig 30. Sine clock input
Fig 31. LVCMOS single-ended clock input
a. Differential sine clock input
a. Rising edge LVCMOS
clock input
clock input
LVCMOS
Table
Sine
All information provided in this document is subject to legal disclaimers.
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
23).
Rev. 1 — 28 September 2011
005aaa173
005aaa174
CLKM
CLKP
CLKM
CLKP
clock input
b. Single-ended sine clock input (with
b. Falling edge LVCMOS
ADC1443D series
transformer)
Sine
clock input
LVCMOS
© NXP B.V. 2011. All rights reserved.
005aaa053
CLKM
CLKP
005aaa054
CLKM
CLKP
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