ad1879 Analog Devices, Inc., ad1879 Datasheet - Page 6

• Manufacturer Part Number: ad1879
• Description: High Performance 16-/18-bit Stereo Adcs
• Manufacturer: Analog Devices, Inc.

AD1878/AD1879
The AD1878/AD1879’s patented
quantization noise-transfer function in a nonuniform manner.
Through careful design, this transfer function can be specified to
high-pass filter the quantization noise out of the audio band into
higher frequency regions. See Figure 27. The Analog Devices’
AD1878/AD1879 also incorporates feedback resonators from
the third integrator’s output to the second integrator’s input and
from the fifth integrator’s output to the fourth integrators’ input.
These resonators do not affect the signal transfer function but
allow flexible placement of zeros in the noise transfer function.
For the AD1878/AD1879, these zeros were placed near the high
frequency end of the audio passband, reducing the quantization
noise in a region where it otherwise would have been increasing.
Oversampling by 64 simplifies the implementation of a high per-
formance audio analog-to-digital conversion system. Antialias
requirements are minimal; a single pole of filtering will usually
suffice to eliminate inputs near F
A fifth-order architecture was chosen both to strongly shape the
noise out of the audio band and to help break up the idle tones
produced in all
dency to generate periodic patterns with a constant dc input, a
response that looks like a tone in the frequency domain. These
idle tones have a direct frequency dependence on the input dc
offset and indirect dependence on temperature and time as it
affects dc offset. The human ear operates effectively like a spec-
trum analyzer and can be sensitive to tones below the integrated
noise floor, depending on frequency and level. The AD1878/
AD1879 suppresses idle tones typically 110 dB or better below
full-scale input levels.
Previously it was thought that higher-order modulators could
not be designed to be globally stable. However, the AD1878/
AD1879’s modulator was designed, simulated, and exhaustively
tested to remain stable for any input within a wide tolerance of
its rated input range. The AD1878/AD1879 was designed to
reset itself should it ever be overdriven and go unstable. It will
reset itself within 5 s at a 48 kHz sampling frequency. Any such
reset events will be invisible to the user since overdriving the in-
puts will produce a “clipped” waveform at the output.
The AD1878/AD1879 modulator architecture has been imple-
mented using switched-capacitors. A systems benefit is that ex-
ternal sample-and-hold amplifiers are unnecessary since the
capacitors perform the sample-and-hold function Coefficient
weights are created out of varying capacitor sizes. The dominant
noise source in this design is kT/C noise, and the input capaci-
tors are accordingly very large to achieve the AD1878/AD1879’s
performance levels. (Each 6 dB improvement in dynamic range
requires a quadrupling of input capacitor size, as well as an
increase in size of the op amps to drive them.) This AD1878/
AD1879 thermal noise has been controlled to properly dither the
input to an 18-bit level. (Note that 16-bit results from either the
AD1878 or AD1879 will be underdithered.)
With capacitors of adequate size and op amps of adequate drive,
a well-designed switched-capacitor modulator will be relatively
insensitive to jitter on the sampling clock. The key issue is
whether the capacitors have had sufficient time to charge or
discharge during the clock period. A properly designed switched
capacitor modulator should be no more sensitive to clock jitter
than are traditional nonoversampled ADCs. This contrasts with
architectures. These architectures have a ten-
S
and its higher multiples.
architectures “shape” the
–6–
continuous-time modulators, which are very sensitive to the
exact location of sampling clock edges.
See Figures 20–23 for illustrations of the AD1878/AD1879’s
typical analog performance resulting from this design. Signal-
to-noise+distortion is shown under a range of conditions. Note
the very good linearity performance of the AD1878/AD1879 as
a consequence of its single-bit
The common-mode rejection (Figure 25) graph illustrates the
benefits of the AD1878/AD1879’s differential architecture. The
excellent channel separation shown in Figure 26 is the result of
careful chip design and layout. The relatively small change in
gain over temperature (Figure 31) results from a robust refer-
ence design.
The output of the AD1878/AD1879 modulators is a stereo
bitstream at 64
analysis of these bits would show that they contain a high qual-
ity replica of the input in the audio band and an enormous
amount of quantization noise at higher frequencies. The input
signal can be recreated directly if these bits are fed into a prop-
erly designed analog low-pass filter.
Digital Filter Characteristics
The digital decimator accepts the modulators’ stereo bitstream
and simultaneously performs two operations on it. First, the
decimator low-pass filters the quantization noise that the modu-
lator shaped to high frequencies and filters any other out-of-
audio-band input signals. Second, it reduces the data rate to an
output word rate equal to F
reduced to stereo 16-/18-bit words at 48 kHz (or other desired
F
ponents of the bitstream, and analog signals in the stopband are
attenuated by at least 115 dB.
The AD1878/AD1879 decimator implements a symmetric Finite
Impulse Response (FIR) filter, resulting in its linear phase re-
sponse. This filter achieves a narrow transition band (0.0923
F
ripple (< 0.001 dB). The narrow transition band allows the
unattenuated digitization of 20 kHz input signals with F
as 44.1 kHz. The stopband attenuation is sufficient to eliminate
modulator quantization noise from affecting the output. Low
passband ripple prevents the digital filter from coloring the
audio signal. For this level of performance, 4095 22-bit coeffic-
ients (taps) were required in each channel of this filter. The
AD1878/AD1879’s decimator employs a proprietary single-
stage, multiplier-free structure developed in conjunction with
Ensoniq Corporation. See Figures 28 and 29 for the digital
filter’s characteristics.
The output from the decimator is available as a single serial
output, multiplexed between left and right channels.
Note that the digital filter itself is operating at 64 F
consequence, Nyquist images of the passband, transition band,
and stopband will be repeated in the frequency spectrum at
multiples of 64
115 dB across the frequency spectrum except for a window
signals, clock noise, or digital noise in these frequency windows
will not be attenuated to the full 115 dB. If the high frequency
signals or noise appear within the passband images within these
windows, they will not be digitally attenuated at all.
S
S
0.5458
). The one-bit quantization noise, other high-frequency com-
), high stopband attenuation (> 115 dB), and low passband
F
S
wide centered at multiples of 64 F
F
F
S
S
. Thus the digital filter will attenuate to
(3.072 MHz for F
S
. The high frequency bitstream is
architecture in Figure 24.
S
= 48 kHz). Spectral
S
. Any input
S
. As a
S
REV. 0
as low