kad5512hp Kenet Inc., kad5512hp Datasheet - Page 7

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kad5512hp

Manufacturer Part Number
kad5512hp
Description
High Performance 12-bit, 250/210/170/125msps Adc
Manufacturer
Kenet Inc.
Datasheet

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Switching Specifications
1. SPI Interface timing is directly proportional to the ADC sample period (t
4ns sample period, and must be scaled proportionally for lower sample rates.
2. The SPI may operate asynchronously with respect to the ADC sample clock.
Thermal Impedance
3. Paddle soldered to ground plane.
ESD
Parameter
ADC Output
Aperture Delay
RMS Aperture Jitter
Output Clock to Data Propagation Delay, LVDS Mode
Output Clock to Data Propagation Delay, CMOS Mode
Latency (Pipeline Delay)
Over Voltage Recovery
SPI Interface
SCLK Period
SCLK Duty Cycle (t
SCLK↑ to CSB↓ Setup Time
SCLK↑ to CSB↑ Hold Time
SCLK↑ to Data Setup Time
SCLK↑ to Data Hold Time
Parameter
Junction to Ambient
KAD5512HP
1,2
HI
Electrostatic charge accumulates on humans, tools and equipment and may discharge
through any metallic package contacts (pins, balls, exposed paddle, etc.) of an integrated
circuit. Industry-standard protection techniques have been utilized in the design of this prod-
uct. However, reasonable care must be taken in the storage and handling of ESD sensitive
products. Contact Kenet for the specific ESD sensitivity rating of this product.
/t
3
CLK
or t
LO
/t
CLK
)
Symbol
Φ
Read or Write
JA
Condition
DDR, Rising Edge
DDR, Falling Edge
SDR, Falling Edge
DDR, Rising Edge
DDR, Falling Edge
SDR, Falling Edge
Write Operation
Read Operation
Read or Write
Read or Write
Read or Write
Read or Write
48-QFN Typ
35
72-QFN Typ
Symbol
27
t
t
t
t
t
t
t
t
t
t
OVR
t
t
CLK
CLK
t
j
DC
DC
DC
DC
DC
DC
t
DS
DH
S
L
A
A
H
S
). Values above reflect multiples of a
Min
-260
-160
-260
-220
-310
-310
264
-12
-12
64
25
-4
-4
°C/W
Unit
Typ
375
-50
-40
-10
-90
-50
8.5
60
10
50
1
Max
120
230
230
200
110
200
75
cycles
cycles
Page 7
Units
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
fs
%

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