dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 153

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Note:
operations are also supported.
Register
A10
B10
C10
D10
C1
D1
A2
B2
A1
B1
A0
B0
C
D
A
B
In all cases where MOVE.W is supported, the MOVEU.W instruction, parallel moves, and bit-manipulation
Using a MOVE.W instruction:
If the extension bits are not in use, the 16-bit
contents of the FF1 portion of the accumulator
are read.
If the extension bits are in use, a 16-bit “limited”
value is substituted. See Section 5.8.1, “Data
Limiter.”
When used in an arithmetic operation:
All 36 bits are used without limiting.
Using a MOVE.L instruction:
The 32 bits in the FF1 and FF0 portions of the
accumulator are read.
Saturation logic is bypassed on MOVE.L.
Using a MOVE.W instruction:
The 4-bit register, sign extended to 16 bits, is
read. (See Figure 5-8 on page 5-11.)
Using a MOVE.W instruction:
The 16-bit FF1 portion is read.
Using a MOVE.B instruction:
The lower 8 bits of FF1 are read.
When used in an arithmetic operation:
The FF1 register is used as a 16-bit source
operand for an arithmetic operation.
FF1 is also used for unsigned moves
(MOVEU.B, MOVEU.W) and with byte pointer
operations (MOVE.BP, MOVEU.BP).
Using a MOVE.W instruction:
The 16-bit FF0 register is read.
Reading an Accumulator Register
Table 5-1. Accessing the Accumulator Registers
Data Arithmetic Logic Unit
Using a MOVE.W instruction:
The 16-bit value is written to the FF1 portion of the
accumulator. The extension portion, FF2, is filled
with sign extension; the FF0 portion is set to zero.
Using a MOVE.B instruction:
The 8-bit value is written into the lower 8 bits of
the FF1 portion of the register. The upper 8 bits of
the FF1 portion and the extension portion, FF2,
are sign extended (zero extended on MOVEU.B).
The FF0 portion is set to zero.
Using a MOVE.L instruction:
All 32 bits of the CDBR bus are written to the FF1
and FF0 portions of the register, FF1:FF0.
The FF2 register is written with sign extension.
Not available as a destination. Long-word values
must be written to the entire accumulator.
Using a MOVE.W instruction:
The 4 LSBs of the 16-bit value are written into the
register. The upper 12 bits are ignored. The corre-
sponding FF1 and FF0 portions are not modified.
(See Figure 5-7 on page 5-10.)
Using a MOVE.W instruction:
The 16-bit value is written into the FF1 register.
The corresponding FF2 and FF0 portions are not
modified.
Using a MOVE.W instruction:
The 16-bit value is written into the FF0 register.
The corresponding FF2 and FF1 portions are not
modified.
Accessing the Accumulator Registers
Writing an Accumulator Register
5-7