dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 512

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

LSR16
Operation:
S >> 16 → D
Description: Logically shift the source operand to the right by 16 bits, and store the result in the destination (D),
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
A-168
LSR16 FFF,FFF
Operation
LSR16
Before Execution
A2
0
zero extending to the left. This operation effectively places the MSP of the source register into the LSP
of the destination register, propagating zero bits through the MSP and the extension register (for accu-
mulator destinations). If the source is an accumulator, both the extension register and MSP are shifted.
When the destination operand is a 16-bit register, the MSP of an accumulator or Y register is written
to it. If both the source and destination are 16-bit registers, the destination is cleared. The result is not
affected by the state of the saturation bit (SA).
This instruction can be used to cast an unsigned integer to a long value.
LSR16
Prior to execution, the Y register contains the value to be shifted ($A1A2:A3A4). The contents of the
destination register are not important prior to execution because they have no effect on the calculated
value. The LSR16 instruction logically shifts the value $A1A2:A3A4 by 16 bits to the right, zero ex-
tends to a full 36 bits, and places the result in the destination register A.
The condition codes are not affected by this instruction.
1 oscillator clock cycle
1 program word
A1A2
(no parallel move)
3456
A1
Y1
Y,A;
Operands
FFF,FFF
FFF
Logical Shift Right 16 Bits
DSP56800E Core Reference Manual
A3A4
3456
A0
Y0
15
0
1
; shift MSP of Y into A0
C
1
1
1
Assembler Syntax:
LSR16
W
1
1
12
1
Logical shift right the first operand by 16 bits, placing
result in the destination operand (new bits zeroed)
An alternate syntax for the preceding instruction if the
source and the destination are the same
11
1
After Execution
A2
0
1
F
S,D
A1A2
0000
F
8
A1
Y1
F
7
(no parallel move)
Comments
b
Freescale Semiconductor
b
A1A2
A3A4
b
4
A0
Y0
LSR16
0
3
1
1
1
0