dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 687
dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
(706 pages)
- Current page: 687 of 706
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Freescale Semiconductor
Instruction
MOVEU.BP
MOVEU.W
MOVE.BP
MOVEU.B
MOVE.W
LSRR.W
MOVE.B
MOVE.L
NEG.BP
MACSU
MPYSU
LSRR.L
NEG.W
ROR.W
LSRAC
NOT.W
ROL.W
LSR.W
LSR16
NORM
ROR.L
LSL.W
MACR
NEG.L
ROL.L
MPYR
NEGA
OR.W
LSRA
OR.L
RTID
MAC
MPY
NEG
NOP
RND
REP
JSR
RTI
SZ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
*
*
*
*
*
*
*
VT
VT
VT
VT
VT
VT
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
V
V
L
T
V
T
Corresponding source bits
Table B-3. Condition Code Summary (Sheet 3 of 4)
*xx
*32
*xx
*36
*36
*xx
*xx
*xx
*xx
*xx
*xx
Restored from stack
Restored from stack
—
—
—
—
—
—
—
—
—
—
—
—
—
—
*8
—
—
—
—
—
—
—
—
—
—
E
*32
*36
*36
*xx
*xx
*xx
*xx
*xx
*xx
*xx
*xx
—
—
—
—
—
—
—
—
—
—
—
—
—
—
*8
—
—
—
—
—
—
—
—
—
—
U
*16 *16
*16 *16
*32 *32
*32 *32
*32
*36 *36
*16 *16
*32 *32
*16 *16
*36 *36 *36
*16 *16
*16 *16
*xx
*xx
*xx
*xx
*xx
*xx
*xx
*xx
Condition Code Calculation
—
—
—
—
—
—
—
—
—
—
—
—
—
—
*8
N
?
*36
*xx
*xx
*xx
*xx
*xx
*xx
*xx
*xx
—
—
—
—
—
—
—
—
—
*8
—
—
—
—
—
Z
?
*32 *32 If the destination is a 16-bit register, the Z bit is set
*xx
*xx
*xx
*xx
*xx
*xx
*xx
*xx
=0
=0
=0
=0
=0
=0
=0
—
—
—
—
—
—
—
—
—
—
—
—
*8
—
—
—
—
—
V
?
*xx
*xx
—
—
—
— If the OMR’s SA bit is one, then the N bit is equal to
—
—
—
—
—
—
—
—
—
—
—
— V is cleared.
— V is cleared.
— V is cleared; L is unchanged.
*8
—
—
— See Section B.3.3.7, “NORM.”
—
—
—
—
—
C
?
?
?
?
?
?
C is set to the value in the MSB of the source oper-
and prior to the operation.
C is set to the value in the LSB of the source operand
prior to the operation.
bit 31 of the result. If SA is zero, then N is equal to bit
35 of the result.
Not affected unless SR is specified as the destination
in the instruction.
based on the LSP of the result. Otherwise, the Z bit is
set based on the full 32-bit quantity.
C is set to the value in the MSB of the source oper-
and prior to the operation.
C is set to the value in the MSB of the source oper-
and prior to the operation.
C is set to the value in the LSB of the source operand
prior to the operation.
C is set to the value in the LSB of the source operand
prior to the operation.
Updates P4–P0 bits in SR.
Updates P4–P0 bits in SR.
Comments
B-11
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