ksz8051mlli Micrel Semiconductor, ksz8051mlli Datasheet - Page 12

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ksz8051mlli

Manufacturer Part Number
ksz8051mlli
Description
10base-t/100base-tx Physical Layer Transceiver
Manufacturer
Micrel Semiconductor
Datasheet

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Pin Description – KSZ8051MLL (Continued)
Notes:
1.
2.
3.
July 2010
Pin Number
47
48
P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipu/O = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipu/Opu = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin with internal pull-up (see
Electrical Characteristics for value) otherwise.
MII Rx Mode: The RXD[3:0] bits are synchronous with RXC. When RXDV is asserted, RXD[3:0] presents valid data to the MAC. RXD[3:0] is
invalid data from the PHY when RXDV is de-asserted.
MII Tx Mode: The TXD[3:0] bits are synchronous with TXC. When TXEN is asserted, TXD[3:0] presents valid data from the MAC. TXD[3:0]
has no effect on the PHY when TXEN is de-asserted.
Pin Name
RST#
NC
Type
I
-
(1)
Pin Function
Chip Reset (active low)
No connect
12
M9999-071210-1.0
KSZ8051MLL

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