ksz8051mlli Micrel Semiconductor, ksz8051mlli Datasheet - Page 25

• Manufacturer Part Number: ksz8051mlli
• Description: 10base-t/100base-tx Physical Layer Transceiver
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
Power Management
The KSZ8051MLL offers the following power management modes:
Power Saving Mode
Power-Saving Mode is used to reduce the transceiver power consumption when the cable is unplugged. It is enabled by
writing a one to register 1Fh, bit 10, and is in effect when auto-negotiation mode is enabled and cable is disconnected (no
link).
In this mode, the KSZ8051MLL shuts down all transceiver blocks, except for transmitter, energy detect and PLL circuits.
By default, Power-Saving Mode is disabled after power-up.
Energy Detect Power-Down Mode
Energy Detect Power-Down Mode is used to further reduce the transceiver power consumption when the cable is un-
plugged. It is enabled by writing a zero to register 18h, bit 11, and is in effect when auto-negotiation mode is enabled and
cable is disconnected (no link).
In this mode, the KSZ8051MLL shuts down all transceiver blocks, except for transmitter and energy detect circuits.
Further power consumption is achieved by extending the time interval in between transmissions of link pulses to check for
the presence of a link partner. The periodic transmission of link pulses is needed to ensure two link partners in the same
low power state and with auto MDI/MDI-X disabled can wake up when the cable is connected between them.
By default, Energy Detect Power-Down Mode is disabled after power-up.
Power-Down Mode
Power-Down Mode is used to power down the KSZ8051MLL device when it is not in use after power-up. It is enabled by
writing a one to register 0h, bit 11.
In this mode, the KSZ8051MLL disables all internal functions, except for the MII management interface. The
KSZ8051MLL exits (disables) Power-Down Mode after register 0h, bit 11 is set back to zero.
Slow Oscillator Mode
Slow Oscillator Mode is used to disconnect the input reference crystal/clock on XI (pin 15) and select the on-chip slow
oscillator when the KSZ8051MLL device is not in use after power-up. It is enabled by writing a one to register 11h, bit 5.
Slow Oscillator Mode works in conjunction with Power-Down Mode to put the KSZ8051MLL device in the lowest power
state with all internal functions disabled, except for the MII management interface. To properly exit this mode and return to
normal PHY operation, use the following programming sequence:
July 2010
1. Disable Slow Oscillator Mode by writing a zero to register 11h, bit 5.
2. Disable Power-Down Mode by writing a zero to register 0h, bit 11.
3. Initiate software reset by writing a one to register 0h, bit 15.
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M9999-071210-1.0
KSZ8051MLL