mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 160

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mc68hc908lb8

Manufacturer Part Number
mc68hc908lb8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Pulse Width Modulator with Fault Input (PWM)
15.8.9 Fault Control Register 2
The fault control register 2 (FCR2) is used to acknowledge and clear the FFLAG.
FTACK — Fault Acknowledge Bit
15.9 PWM Glossary
CPU cycle
PWM clock cycle (or period)
PWM cycle (or period)
160
The FTACK bit is used to acknowledge and clear FFLAG. This bit will always read 0. Writing a 1 to this
bit will clear FFLAG. Writing a 0 will have no effect.
One internal bus cycle (1/BUSCLK)
One tick of the PWM counter (1/BUSCLK with no prescaler). See
Edge-aligned mode: The time it takes the PWM counter to count up (modulus/BUSCLK). See
Figure
15-26.
Address: $0044
Reset:
Read:
Write:
Figure 15-26. PWM Clock Cycle and PWM Cycle Definition
Bit 7
0
0
Figure 15-25. Fault Control Register (FCR2)
= Unimplemented
PWM
CLOCK
CYCLE
6
0
0
MC68HC908LB8 Data Sheet, Rev. 1
Edge-Aligned Mode
5
0
0
PWM CYCLE (OR PERIOD)
4
0
0
3
0
0
Figure
2
0
0
15-26.
1
0
0
Freescale Semiconductor
FTACK
Bit 0
0
0

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