mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 39

• Manufacturer Part Number: mc68hc908lb8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

2.6.4 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, and $XXE0.
During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will
fail. Use this step-by-step procedure to program a row of FLASH memory
representation).
This program sequence is repeated throughout the memory until all data is programmed.
1. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM
Freescale Semiconductor
10. After time, t
10. Clear the PGM bit.
11. Wait for a time, t
12. Clear the HVEN bit.
13. After time, t
bit, must not exceed the maximum programming time, t
9. Clear the HVEN bit.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address to be programmed.
8. Wait for a time, t
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
address and data for programming.
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order as shown, but other unrelated operations
may occur between the steps.
A mass erase will erase the internal oscillator trim value at $FFC0.
In order to avoid program disturbs, the row must be erased before any byte
on that row is programmed.
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
RCV
RCV
(typical 1 µs), the memory can be accessed in read mode again.
(minimum 1 µs), the memory can be accessed in read mode again.
NVS
PGS
PROG
NVH
(1)
(minimum 10 µs).
(minimum 5 µs).
(minimum 5 µs).
(minimum 30 µs).
MC68HC908LB8 Data Sheet, Rev. 1
CAUTION
PROG
NOTE
NOTE
NOTE
maximum.
(Figure 2-4
FLASH Memory (FLASH)
is a flowchart
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