mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 172

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mc68hc908lb8

Manufacturer Part Number
mc68hc908lb8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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System Integration Module (SIM)
172
PIN LOGIC
RESET
Signal Name
BUSCLKX4
BUSCLKX2
PORRST
IRST
R/W
IDB
IAB
V
DD
INTERNAL
PULLUP
DEVICE
Signal from the power-on reset module to the SIM
Buffered clock from the internal, RC or XTAL oscillator circuit.
The BUSCLKX4 frequency divided by two. This signal is again divided by two in the SIM
to generate the internal bus clocks (bus clock = BUSCLKX4 ÷ 4).
Internal address bus
Internal data bus
Internal reset signal
Read/write signal
SIM RESET STATUS REGISTER
RESET PIN CONTROL
Table 17-1. Signal Name Conventions
POR CONTROL
STOP/WAIT
CONTROL
CONTROL
AND PRIORITY DECODE
INTERRUPT CONTROL
CLOCK
Figure 17-1. SIM Block Diagram
MC68HC908LB8 Data Sheet, Rev. 1
CLOCK GENERATORS
RESET
COUNTER
SIM
÷ 2
CONTROL
MASTER
RESET
Description
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSC)
COP CLOCK
BUSCLKX4 (FROM OSC)
BUSCLKX2 (FROM OSC)
INTERNAL CLOCKS
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT SOURCES
CPU INTERFACE
FORCED MONITOR MODE ENTRY
Freescale Semiconductor

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