mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 211

• Manufacturer Part Number: mc68hc908lb8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

The monitor code has been updated from previous versions of the monitor code to allow enabling the
internal oscillator to generate the internal clock. This addition, which is enabled when IRQ is held low out
of reset, is intended to support serial communication/programming at 9600 baud in monitor mode by using
the internal oscillator, and the internal oscillator user trim value OSCTRIM (FLASH location $FFC0, if
programmed) to generate the desired internal frequency (4.0 MHz). Since this feature is enabled only
when IRQ is held low out of reset, it cannot be used when the reset vector is programmed (i.e., the value
is not $FFFF) because entry into monitor mode in this case requires V
Enter monitor mode with pin configuration shown in
rising edge of RST latches monitor mode. Once monitor mode is latched, the values on the specified pins
can change.
Once out of reset, the MCU waits for the host to send eight security bytes (see
security bytes, the MCU sends a break signal (10 consecutive 0s) to the host, indicating that it is ready to
receive a command.
Freescale Semiconductor
2
3
5
1 µF
1 µF
DB9
+
+
Figure 19-10. Normal Monitor Mode Circuit (External Clock, with High Voltage)
1
3
4
5
7
8
C1+
C1–
C2+
C2–
MAX232
V+
V–
16
15
2
10
6
1 µF
9
V
DD
+
+
2
1 µF
MC68HC908LB8 Data Sheet, Rev. 1
74HC125
1
3
+
1 µF
74HC125
6
4
10 kΩ
5
Figure 19-11
V
V
DD
9.8304 MHz CLOCK
TST
10 kΩ
0.1 µF
9.1 V
1 kΩ
*
V
DD
by pulling RST low and then high. The
RST (PTA5)
OSC1 (PTC0)
IRQ (PTC2)
PTA0
TST
on IRQ.
19.3.2
Monitor Module (MON)
Security). After the
PTA1
PTA4
V
V
* Value not critical
DD
SS
10 kΩ
10 kΩ
V
DD
0.1 µF
*
*
V
DD
211