mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 126

• Manufacturer Part Number: mc68hc908kx8
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Communications Interface Module (SCI)
TXINV — Transmit Inversion Bit
M — Mode (Character Length) Bit
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
PTY — Parity Bit
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This read/write bit reverses the polarity of transmitted data. Reset clears the TXINV bit.
This read/write bit determines whether SCI characters are eight or nine bits long. (See
The ninth bit can serve as an extra stop bit, as a receiver wakeup signal, or as a parity bit. Reset clears
the M bit.
This read/write bit determines which condition wakes up the SCI: a 1 (address mark) in the most
significant bit position of a received character or an idle condition on the RxD pin. Reset clears the
WAKE bit.
This read/write bit determines when the SCI starts counting 1s as idle character bits. The counting
begins either after the start bit or after the stop bit. If the count begins after the start bit, then a string
of 1s preceding the stop bit may cause false recognition of an idle character. Beginning the count after
the stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
Reset clears the ILTY bit.
This read/write bit enables the SCI parity function. (See
inserts a parity bit in the most significant bit position. (See
This read/write bit determines whether the SCI generates and checks for odd parity or even parity.
(See
1 = Transmitter output inverted
0 = Transmitter output not inverted
1 = 9-bit SCI characters
0 = 8-bit SCI characters
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit.
0 = Idle character bit count begins after start bit.
1 = Parity function enabled
0 = Parity function disabled
1 = Odd parity
0 = Even parity
Table
12-5.) Reset clears the PTY bit.
Setting the TXINV bit inverts all transmitted values, including idle, break,
start, and stop bits.
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
NOTE
NOTE
Table
Figure
12-5.) When enabled, the parity function
12-2.) Reset clears the PEN bit.
Freescale Semiconductor
Table
12-5.)