mpc8349ea Freescale Semiconductor, Inc, mpc8349ea Datasheet - Page 6

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mpc8349ea

Manufacturer Part Number
mpc8349ea
Description
Mpc8349ea Powerquicc
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical Characteristics
2
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8349EA. The MPC8349EA is currently targeted to these specifications. Some of these specifications
are independent of the I/O cell, but are included for a more complete reference. These are not purely I/O
buffer design specifications.
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— Redirects interrupts to external INTA pin in core disable mode.
— Unique vector number for each interrupt source
Dual industry-standard I
— Two-wire interface
— Multiple master support
— Master or slave I
— On-chip digital filtering rejects spikes on the bus
— System initialization data optionally loaded from I
DMA controller
— Four independent virtual channels
— Concurrent execution across multiple channels with programmable bandwidth control
— Handshaking (external control) signals for all channels: DMA_DREQ[0:3],
— All channels accessible to local core and remote PCI masters
— Misaligned transfer capability
— Data chaining and direct mode
— Interrupt on completed segment and chain
DUART
— Two 4-wire interfaces (RxD, TxD, RTS, CTS)
— Programming model compatible with the original 16450 UART and the PC16550D
Serial peripheral interface (SPI) for master or slave
General-purpose parallel I/O (GPIO)
— 64 parallel I/O pins multiplexed on various chip interfaces
System timers
— Periodic interrupt timer
— Real-time clock
— Software watchdog timer
— Eight general-purpose timers
Designed to comply with IEEE Std. 1149.1™, JTAG boundary scan
Integrated PCI bus and SDRAM clock generation
Electrical Characteristics
MPC8349EA PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
hardware
DMA_DACK[0:3], DMA_DDONE[0:3]
2
C mode support
2
C interfaces
2
C-1 EPROM by boot sequencer embedded
Freescale Semiconductor

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