mpc5632m Freescale Semiconductor, Inc, mpc5632m Datasheet - Page 8

• Manufacturer Part Number: mpc5632m
• Description: Mpc5634m Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

Overview
1. Revision 1 of the MPC5633M has a different RAM organization: 48 KB general-purpose RAM, of which 24 KB are on the
standby power supply.
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On-chip static RAM
— For MPC5634M: 94 KB general purpose RAM of which 32 KB are on standby power supply
— For MPC5633M: 64 KB general purpose RAM of which 24 KB are on standby power supply
— For MPC5632M: 48 KB general purpose RAM of which 24 KB are on standby power supply
Boot assist module (BAM)
— Enables and manages the transition of MCU from reset to user code execution in the following configurations:
Periodic interrupt timer (PIT)
— 32-bit wide down counter with automatic reload
— Four channels clocked by system clock
— One channel clocked by crystal clock
— Each channel can produce periodic software interrupt
— Each channel can produce periodic triggers for eQADC queue triggering
— One channel out of the five can be used as wake-up timer to wake device from low power stop mode
System timer module (STM)
— 32-bit up counter with 8-bit prescaler
— Clocked from system clock
— Four-channel timer compare hardware
— Each channel can generate a unique interrupt request
— Designed to address AutoSAR task monitor function
Software watchdog timer (SWT)
— 32-bit timer
— Clock by system clock or crystal clock
— Can generate either system reset or non-maskable interrupt followed by system reset
— Enabled out of reset
Enhanced modular I/O system (eMIOS)
— 16 standard timer channels (up to 14 channels connected to pins in 144 LQFP)
— 24-bit timer resolution
— Supports a subset of the timer modes found in eMIOS on MPC5554
— 3 selectable time bases plus shared time or angle counter bus
— DMA and interrupt request support
— Motor control capability
Second-generation enhanced time processor unit (eTPU2)
— High level assembler/compiler
— Enhancements to make ‘C’ compiler more efficient
— New ‘engine relative’ addressing mode
— 32 channels (each channel has dedicated I/O pin in all packages except 100 LQFP)
— 24-bit timer resolution
— Time base for the eTPU can be run at full system speed
— 14 KB code memory and 3 KB data memory
— Variable number of parameters allocatable per channel
– Execution from internal flash memory
– Execution from external memory on the calibration bus
– Download and execution of code via FlexCAN or eSCI
Preliminary—Subject to Change Without Notice
MPC5634M Microcontroller Data Sheet, Rev. 3
Freescale Semiconductor
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