dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 48

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dp83261

Manufacturer Part Number
dp83261
Description
Bmac Device Fddi Media Access Controller
Manufacturer
National Semiconductor Corporation
Datasheet
D0
D1 – 4
D5
D6
D7
6 0 Control Information
Exception Mask Register (EMR)
The Exception Mask Register (EMR) is used to mask bits in the Exception Status Register (ESR) If a bit in Register EMR is set
to One the corresponding bit in Register ESR will be applied to the Condition Register which can then be used to generate an
interrupt
All bits in this register are set to Zero upon request
ACCESS RULES
REGISTER BITS
Bit
ZERO
D7
Address
2Dh
Symbol
PPE
RES
CPE
CCE
ZERO
CCE
D6
PHY Interface Parity Error Mask This bit is used to mask ESR PPE
Reserved
Control Bus Parity Error Mask This bit is used to mask ESR CPE
Control Bus Error Mask This bit is used to mask ESR CCE
Zero This bit is always Zero This implies that the CWI bit never contributes to the Interrupt Signal
CPE
D5
Always
Read
RES
D4
(Continued)
RES
D3
Always
Write
RES
D2
48
RES
D1
Description
PPE
D0

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