dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 71
dp83261
Manufacturer Part Number
dp83261
Description
Bmac Device Fddi Media Access Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83261.pdf
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CBP
CBD7 – 0
CBA7 – 0
CE
R W
ACK
INT
Symbol
7 0 Signal Descriptions
Interface Organization
The BMAC device signals are organized into five Interfaces
Application Note 689 BMAC Device Hardware Design Guide provides a discussion of design considerations and tradeoffs for
using the BMAC Device
7 1 CONTROL INTERFACE
The Control Interface operates asynchronous to the operation of the data services During an access the external Control Bus
is synchronized with the internal Control Bus
The ACK and INT signals are open drain signals to allow wire ORing several such signals
Control Interface Used for processor access to the BMAC device
PHY Interface Interface signals to the DP83251 55 PLAYER device
MAC Indicate Interface Signals for receiving and processing incoming frames
MAC Request Interface Signals used to capture tokens and transmit frames
Electrical Interface Signals associated with power supply and clocking
9 – 6 3 – 1
131 – 129
127 – 123
Pin
132
120
119
122
121
10
I O
I O
I O
OD
OD
I
I
I
Control Bus Parity Odd parity on CBD7 – 0
Control Bus Data
Control Bus Address Address of a particular register
Control Bus Enable Handshake signal used to begin a Control Interface access Active low signal
Read E Write Determines current direction of a Control Interface access
E Acknowledge Acknowledges that the Control Interface access has been performed Active low
open drain signal
E Interrupt Indicates presence of one or more enabled condition(s) from the Event Registers
Active low open drain signal
71
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