dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 50

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dp83261

Manufacturer Part Number
dp83261
Description
Bmac Device Fddi Media Access Controller
Manufacturer
National Semiconductor Corporation
Datasheet
D0
D1
D2
D3
D4 – 5
D6
D7
6 0 Control Information
Interrupt Mask Register (IMR)
The Interrupt Mask Register (IMR) is used to mask bits in the Interrupt Condition Register (ICR) If a bit in Register IMR and the
corresponding bit in Register ICR are set to One the INT pin is forced low and causes an interrupt Each bit in the IMR
corresponds to an Event Register or a pair of Event Registers and associated bits
ACCESS RULES
REGISTER BITS
Bit
ESE
D7
Address
2Fh
Symbol
RNG
TTE
CIE
COE
RES
IERR
ESE
IERR
D6
Ring Event Mask This bit is used to mask ICR RNG
Token and Timer Event Mask This bit is used to mask ICR TTE
Counter Increment Event Mask This bit is used to mask ICR CIE
Counter Overflow Event Mask This bit is used to mask ICR COE
Reserved
Internal Error Mask This bit is used to mask ICR IERR
Exception Status Event Mask This bit is used to mask ICR ESE
RES
D5
Always
Read
RES
D4
(Continued)
COE
D3
Always
Write
CIE
D2
50
TTE
D1
Description
RNG
D0

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