mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 10

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mfrc52301hn1-trayb

Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
8.3.2.1 SPI read data
8.3.2 Serial Peripheral Interface
Table 5.
A serial peripheral interface (SPI compatible) is supported to enable high-speed
communication to the host. The interface can handle data speeds up to 10 Mbit/s. When
communicating with a host, the MFRC523 acts as a slave, receiving data from the
external host for register settings, sending and receiving data relevant for RF interface
communication.
An interface compatible with SPI enables high-speed serial communication between the
MFRC523 and a microcontroller. The implemented interface is in accordance with the SPI
standard.
The timing specification is given in
The MFRC523 acts as a slave during SPI communication. The SPI clock signal SCK must
be generated by the master. Data communication from the master to the slave uses the
MOSI line. The MISO line is used to send data from the MFRC523 to the master.
Data bytes on both MOSI and MISO lines are sent with the MSB first. Data on both MOSI
and MISO lines must be stable on the rising edge of the clock and can be changed on the
falling edge. Data is provided by the MFRC523 on the falling clock edge and is stable
during the rising clock edge.
Reading data using SPI requires the byte order shown in
to read out up to n-data bytes.
The first byte sent defines both the mode and the address.
Pin
D6
D5
D4
D3
D2
D1
Fig 7.
SPI connection to host
Connection protocol for detecting different interface types
All information provided in this document is subject to legal disclaimers.
Interface type
UART (input)
MX
DTRQ
-
-
-
-
Rev. 3.3 — 5 March 2010
115233
SCK
MOSI
MISO
NSS
Section 14.1 on page
SPI (output)
MOSI
SCK
-
-
-
-
SCK
MOSI
MISO
NSS
MFRC523
001aal159
Table 6
77.
to be used. It is possible
Contactless reader IC
I
ADR_0
ADR_1
ADR_2
ADR_3
ADR_4
ADR_5
…continued
2
MFRC523
C-bus (I/O)
© NXP B.V. 2010. All rights reserved.
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