mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 83

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mfrc52301hn1-trayb

Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
16.1.3.3 Example: Output test signals ADC channel I and ADC channel Q
16.1.3.4 Example: Output test signals RxActive and TxActive
Figure 30
AUX2, respectively. The AnalogTestReg register is set to 56h.
Figure 31
The AnalogTestReg register is set to CDh.
Fig 30. Output ADC channel I on pin AUX1 and ADC channel Q on pin AUX2
At 106 kBd, RxActive is HIGH during data bits, parity and CRC reception. Start bits
are not included
At 106 kBd, TxActive is HIGH during start bits, data bits, parity and CRC transmission
At 212 kBd, 424 kBd and 848 kBd, RxActive is HIGH during data bits and CRC
reception. Start bits are not included
At 212 kBd, 424 kBd and 848 kBd, TxActive is HIGH during data bits and CRC
transmission
(1) ADC_I (1 V/div) on pin AUX1.
(2) ADC_Q (500 mV/div) on pin AUX2.
(3) RF field.
shows the channel behavior test signals ADC_I and ADC_Q on pins AUX1 and
shows the RxActive and TxActive test signals relating to RF communication.
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
(1)
(2)
(3)
Contactless reader IC
5 μs/div
MFRC523
001aak599
© NXP B.V. 2010. All rights reserved.
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