mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 20
mfrc52301hn1-trayb
Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1-TRAYB.pdf
(98 pages)
- Current page: 20 of 98
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NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
Fig 17. Register read and write access
S
S
8.3.4.7 Register read access
SLAVE ADDRESS
SLAVE ADDRESS
I
I
2
[A7:A0]
2
[A7:A0]
S
C-BUS
C-BUS
To read out data from a specific register address in the MFRC523, the host controller must
use the following procedure:
After the write access, read access can start. The host sends the device address of the
MFRC523. In response, the MFRC523 sends the content of the read access register. In
one frame all data bytes can be read from the same register address. This enables fast
FIFO buffer access or register polling.
The Read/Write (R/W) bit is set to logic 1.
•
•
•
•
Firstly, a write access to the specific register address must be performed as indicated
in the frame that follows
The first byte of a frame indicates the device address according to the I
The second byte indicates the register address. No data bytes are added
The Read/Write bit is 0
sent by master
sent by slave
SLAVE ADDRESS
optional, if the previous access was on the same register address
(W)
(W)
I
0
0
2
[A7:A0]
C-BUS
All information provided in this document is subject to legal disclaimers.
A
A
Rev. 3.3 — 5 March 2010
0
(R)
1
0
115233
S
P
A
write cycle
read cycle
A
0
start condition
stop condition
acknowledge
0
JOINER REGISTER
[0:n]
ADDRESS [A5:A0]
JOINER REGISTER
ADDRESS [A5:A0]
DATA
DATA
[7:0]
[7:0]
[0:n]
A
A
A
W
R
A
not acknowledge
write cycle
read cycle
A
[0:n]
Contactless reader IC
P
MFRC523
© NXP B.V. 2010. All rights reserved.
DATA
[7:0]
P
P
2
C-bus rules
001aak592
A
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