w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 62

• Manufacturer Part Number: w83l950d
• Description: Peripheral Personal Computer Keyboard Controller
• Manufacturer: Winbond Electronics Corp America

13.1.3 Transmit / Receive buffer register (TB/RB)
13.1.4 Serial I/O 1 status register (SIO1STS)
The read-only serial I/O1 status register consists of seven flags (bits 0 to 6) that indicate the operating
status of the serial I/O function and various errors. Three of the flags (bits 4 to 6) are valid only in UART
mode. The Receive Buffer Full flag (bit 1) is cleared to "0" when the Receive Buffer Register is read. If
there is an error, it is detected at the same time that data is transferred from the receive shift register to
the receive buffer register, and the receive buffer full flag is set. A write to the serial I/O 1 status register
clears all the error flags OE, PE, FE, and SE in respectively. Writing “0" to the serial I/O1 enable bit
(SIOE), bit 7 of the serial I/O control register, also clears all the status flags, including the error flags.
The bits 0 to 6 of the serial I/O1 status register are initialized to “0" at reset, but if the transmit enable bit
(bit 4 of the serial I/O1 control register) has been set to “1", the transmit shift completion flag (bit 2) and
the transmit buffer empty flag (bit 0) are become “1".
SFR address
Default value
The transmitting buffer register and the receiving buffer register are located at the same
address. The transmit buffer is write-only and the receive buffer is read-only. If a character bit
length is 7 bits the MSB of data stored in the receive buffer is ‘0’.
SFR address
Default value
Bit 7: No use (return “1” when read)
Bit 6: Summing error flag (SE)
Bit 5: Framing error flag (FE)
Bit 4: Parity error flag (PE)
Bit 3: Overrun error flag (OE)
Bit 2: Transmit shift completion flag (TSC)
Bit 1: Receive buffer full flag (RBF)
Bit 0: Transmit buffer empty flag (TBE)
= 1: (OE) U (PE) U (FE) =1
= 1: Framing error
= 1: Parity error
= 1: Overrun error
= 1: Transmit shift complete
= 1: Buffer full
= 1: Buffer empty
= 0: (OE) U (PE) U (FE) =0
= 0: No error
= 0: No error
= 0: No error
= 0: Transmit shift in process
= 0: Buffer empty
= 0: Buffer full
0xC8
XX
0xC9
0x80
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Publication Release Date: June 23, 2003
W83L950D
Revision 1.0