w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 87

• Manufacturer Part Number: w83l950d
• Description: Peripheral Personal Computer Keyboard Controller
• Manufacturer: Winbond Electronics Corp America

21.8 SMBus Host/Slave interrupt Control Register (ICR)
SFR Address
Default Value
Attribute:
Note: If disable a bit in ICR, then the corresponding bit in ISR will NOT be set, when
corresponding event occurred. In other words, if disable the bit 5 of ICR, then the bit 5 of ISR is
never be set.
1:0
Bit
7
6
5
4
3
2
1
0
Transmit or Receive FIFO Threshold Level (TXRX_LEVEL). These two bits are used to
active the threshold interrupt when Transmitter or Receiver Data FIFO is below or over
threshold level, respectively.
Global Interrupt Enable (GLOBAL_EN). Enable global interrupt, if set to 1.
Receive Data Ready Interrupt Enable (RXDATA_EN). Enable Data ready interrupt.
Host Slave Address Match Interrupt Enable (ADDR_MATCH_EN). Enable the matched
host slave address interrupt if set to 1
Master/Slave Receive Package End Interrupt Enable (RXEND_EN). Enable receiver
package end interrupt, if set to 1.
Host Status Interrupt Enable (HSTATUS_EN). Enable host status interrupt, if set to 1
Transmit Empty Interrupt Enable (TXEMP_EN). Enable transmitter FIFO empty interrupt, if
set to 1.
Transmit Threshold Interrupt Enable (TXTH_EN). Enable transmitter FIFO threshold
register interrupt, if set to 1.
Receive Threshold Interrupt Enable (RXTH_EN). Enable receiver FIFO threshold register
interrupt, if set to 1.
Bit1:0
00
01
10
11
0xA7
0x00
Read/Write
RX/TX FIFO Threshold
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13
1
4
8
Description
W83L950D