w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 85
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w83l950d
Manufacturer Part Number
w83l950d
Description
Peripheral Personal Computer Keyboard Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83L950D.pdf
(105 pages)
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21.3 SMBus Host Read Byte Count Register (H_RBC)
21.4 SMBus Host/Slave Data FIFO Register (DFIFO)
21.5 SMBus Host-Slave Address Register (SADR)
SFR Address
Default Value
Attribute:
SFR Address
Default Value
Attribute:
SFR Address
Default Value
Attribute:
7:0
7:0
7:1
0
Bit
Bit
Bit
Host Read Byte Count (H_RBC). This bit is used for Host Continue Read Mode which is
determine the number of data byte host should read and then generate a NOT ACK. This
register is only available when H_CONTRD set to 1.
Host/Slave Data FIFO Register (HS_DATAFIFO).
This is a 16-bytes data FIFO for Host/Master/Slave transmit and receive. During the
host/master mode, when a sequential 8-bit data fills into this data FIFO register, the data
are also sequent printing out on SMBus.
In the Slave-transmit mode, the SMBus will hold CLK low until each returned data byte
written to FIFO. This feature will be disabled in Slave-receive mode during the NOT ACK
receive operation.
Host-Slave Address Register (HS_ADDR). When the host serves as slave mode, this
register should be compared. If the external master transmits the address matched this
register, the host will be ready to receive or transmit data.
Reserved for general call.
0xA2
0x00
Read/Write
0xA3
0x00
Read/Write
0xA4
0x00
Read/Write
- 76 -
Description
Description
Description
W83L950D
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