w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 89
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w83l950d
Manufacturer Part Number
w83l950d
Description
Peripheral Personal Computer Keyboard Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83L950D.pdf
(105 pages)
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21.10 SMBus Host/Slave FIFO Status Register (FSR)
21.11 SMBus User Defined Register (UDR)
21.12 SMBus System Control Register (SCR)
7:3
2
1
0
7:0
7
6
5:1
0
SFR Address 0xAA
Default Value 0x06
Attribute:
Bit
SFR Address 0xAB
Default Value 0x00
Attribute:
Bit
Bit
SFR Address 0xAC
Default Value 0x80
Attribute:
Reserved.
Transmit Shift Register Empty (TXSREMP). This bit indicates transmit shift register is
empty.
Transmit FIFO Empty (TXFIFOEMP). This bit indicates transmit FIFO is empty.
Receive Data Ready (RXRDY). This bit indicates the data is ready to read when the I
operating at Master receive or Slave receive.
User Defined Register (UDREG)
SCL / SDA interrupt pin poiarty
SCL / SDA interrupt pin selection bit.
Reserved.
Software Reset (SOFT_RST).
1 = Generate one clock pulse as reset signal. It will cause a reset on SMBus controller.
0: falling edge
1: rising edger
0: SDA vaild
1: SCL valid
Read/Write
Read/Write
Read/Write
- 80 -
Description
Description
Description
W83L950D
2
C is
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