tda5225 Infineon Technologies Corporation, tda5225 Datasheet - Page 54

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tda5225

Manufacturer Part Number
tda5225
Description
Enhanced Sensitivity Multi-channel Quad-conf Igurat Ion Receiver With Digital Slicer
Manufacturer
Infineon Technologies Corporation
Datasheet

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The SPI also includes a safety feature by which the checksum is calculated with an
XOR operation from the address and the data when writing SFR registers. The
checksum is in fact an XOR of the data 8-bitwise after every 8 bits of the SPI write
command. The calculated checksum value is automatically written in the SPICHKSUM
register and can be compared with the expected value. After the SPICHKSUM register
is read, its value is cleared.
In case of an SPI Burst Write frame, a checksum is calculated from the SPI start address
and consecutive data fields.
Figure 32
Table 4
Data Sheet
Instruction
WR
RD
WRB
RDB
Instruction Set
SPI Checksum Generation
SPI shift register
Description
Write to chip
Read from chip
Write to chip in Burst mode
Read from chip in Burst mode 0000 0101
XOR
54
Checksum SFR
Instruction Format
0000 0010
0000 0011
0000 0001
enable every 8 bit
Functional Description
read/clear
V1.0, 2010-02-19
TDA5225

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