pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 113

• Manufacturer Part Number: pxb4340e
• Description: Atm Oam Processor Aop
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CCCMEN
0
1
CARIEN
0
1
CLOCFAI
F5 LOC failure state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
CLOCDEF
F5 LOC defect state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
CRDIFAI
F5 RDI failure state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
CRDIDEF
F5 RDI defect state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
CAISFAI
F5 AIS failure state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
CAISDEF
F5 AIS defect state. Initialize to 0 at connection setup. Do not change
by µP in normal operation.
F5 CC monitoring disabled.
F5 CC monitoring enabled.
State transition to LOC failure state and out of LOC failure
state is reported by use of the µP interrupt DCSTTR.
F5 AIS or RDI Cell insertion disabled.
F5 AIS or RDI Cell insertion enabled.
Independent of the reason for cell generation (forced
insertion by ARINS, detected LOC or AIS state) AIS/RDI
cell generation is always controlled by this flag. Necessary
e.g. to suppress RDI at endpoints of multicast or
unidirectional connections.
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04.2000