pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 118

• Manufacturer Part Number: pxb4340e
• Description: Atm Oam Processor Aop
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Bit 13
Bit 12..9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4..0
Bit 31
Bit 30..15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
PIP
0
1
Initialize to 0 at connection setup. Do not change by µP in normal
operation.
PCCINS
1
Initialize to 0 at connection setup. Do not change by µP in normal
operation.
PARINS
1
Initialize to 1 at connection setup. Do not change by µP in normal
operation.
Initialize to 0 at connection setup. Do not change by µP in normal
operation.
PAR
Dword parity protection. In normal operation write to 0. Should always
read as 0.
Initialize to 0 at connection setup. Do not change by µP in normal
operation.
PICCEN
1
PSCCTEN
1
Reserved, set to 0.
PSCCOEN
1
PECCOEN
1
F4 Originating End Point (OEP).
F4 intermediate Point.
Insertion of F4 CC Cells for all activated CC flows; period
determined by MAXTS in register SCCONF1.
Force insertion of F4 AIS Cell downstream.
Enable Internal Continuity Check,
downstream direction. Set to 0 if ICC is not used.
Terminate a F4 Segment Continuity Check.
Should only be enabled at a F4 TSP (PTSP=1).
Originate a F4 Segment Continuity Check.
Should only be enabled at a F4 OSP (POSP=1).
Originate a F4 End-to-End Continuity Check.
Should only be enabled at a F4 OEP (PIP=0).
3-118
terminating ICC in
04.2000