pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 74

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pxb4340e

Manufacturer Part Number
pxb4340e
Description
Atm Oam Processor Aop
Manufacturer
Infineon Technologies Corporation
Datasheet

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Read/write Address B0
Value after reset 0000
Read/write Address B1
Value after reset 0000
Data Sheet
DWDRL(15:0)
SP
DWDRH(14:0)
SP
H
H
DMA Write Register(15:0), specifies the lower 16-bit of the Dword to be
written into the external connection RAM via DMA. The bit positions to
be overwritten in the connection RAM Dword are specified with the
associated mask register DMRL, the Dword of the RAM entry is
selected by DCONF.INDEX.
Select Parity: if SP=0 the correct parity is generated when the dword is
transferred to the external RAM; if SP=1 a false parity bit is generated.
DMA Write Register(31:16), specifies the upper 16-bit of the Dword to
be written into the external connection RAM via DMA. The bit positions
to be overwritten in the connection RAM Dword are specified with the
associated mask register DMRL, the Dword of the RAM entry is
selected by DCONF.INDEX.
H
H
DWDRL(15:8)
DWDRH(7:0)
DWDRL(7:0)
DWDRH(14:8)
3-74
04.2000

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