pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 125

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Field
ALM
SIM
Data Sheet
Bits
2
0
Type
rw
rw
Description
Alarm Mode, E1 only
Selects the AIS alarm detection mode in E1 mode. In T1/J1 mode this bit
is reserved.
0
1
Alarm Simulation, in E1 mode
SIM has to be held stable at high or low level for at least one receive clock
period before changing it again.
0
1
Alarm Simulation, in T1/J1 mode
Setting/resetting of SIM initiates internal error simulation of AIS (blue
alarm), loss-of-signal (red alarm) and code violations. The error counter
CVC is incremented.The selection of simulated alarms is done by the
error simulation counter: LSR2.ESC(2:0) which is incremented with each
setting of bit SIM. For complete checking of the alarm indications eight
simulation steps are necessary (LSR2.ESC(2:0) = ´0´ after a complete
simulation).
SIM has to be held stable at high or low level for at least one receive clock
period before changing it again.
B
B
B
B
AIS alarm is detected if the incoming data stream contains less than
3 zeros within a period of 512 bits and a loss of frame alignment is
indicated. Recovery: The alarm is cleared if 3 or more zeros within
512 bits are detected or the FAS word is found.
AIS alarm is detected if the incoming data stream contains less than
3 zeros in each doubleframe period of two consecutive
doubleframe periods (1024 bits). Recovery: The alarm is cleared if
3 or more zeros are detected within two consecutive doubleframe
periods.
violations.
The AIS alarm is detected according to ETS300233. Detection: An
The AIS alarm is detected according to ITU-T G.775 Detection: An
Normal operation.
Initiates internal error simulation of AIS, loss-of-signal and code
125
Register DescriptionMode Register 0
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
TM