psd813f1a-90ut STMicroelectronics, psd813f1a-90ut Datasheet - Page 24

• Manufacturer Part Number: psd813f1a-90ut
• Description: Flash In-system Programmable Isp Peripherals For 8-bit Mcus
• Manufacturer: STMicroelectronics

Preliminary
The
PSD913F1
Functional
Blocks
(cont.)
9.1.1.6.3 EEPROM Software Data Protect (SDP)
To enable SDP mode at run time, the MCU must write three specific data bytes at three
specific memory locations, as shown in Figure 3. Any further writes to EEPROM when SDP
is set will require this same sequence, followed by the byte(s) to write. The first SDP enable
sequence can be followed directly by the byte(s) to be written.
To disable SDP mode, the MCU must write specific bytes to six specific locations, as shown
in Figure 4.
The MCU must not be executing code from EEPROM when these instructions are invoked.
The MCU must be operating from some other memory when enabling or disabling SDP
mode.
The state of SDP mode is not changed by power on/off sequences (nonvolatile). When
either the SDP enable or SDP disable instructions are issued from the MCU, the MCU must
use the Toggle bit (status bit DQ6) or the Ready/Busy output pin to check programming
status. The Ready/Busy output is driven low from the first write of AAh @ 555h until the
completion of the internal storage sequence. Data Polling (status bit DQ7) is not supported
when issuing the SDP enable or SDP disable commands.
Note: Using the SDP sequence (enabling, disabling, or writing data) is initiated when
specific bytes are written to addresses on specific “pages” of EEPROM memory, with no
more than 120 µsec between writes. The addresses 555h and AAAh are located on
different pages of EEPROM. This is how the PSD913F1 distinguishes these instruction
sequences from ordinary writes to EEPROM, which are expected to be within a single
EEPROM page.
Figure 3. EEPROM SDP Enable Flowcharts
Page Write
Instruction
SDP ENABLE ALGORITHM
WRITE AAh to
Address AAAh
WRITE 55h to
WRITE A0h to
Address 555h
Address 555h
SDP is set
Page Write
Instruction
(cont.)
in Memory
Write
SDP
Set
WRITE Data to
WRITE AAh to
Address AAAh
WRITE A0h to
Address 555h
WRITE 55h to
Address 555h
be Written in
any Address
(Write Cycle Time)
Write Data
not Set
after tWC
SDP Set
SDP
+
WRITE
is enabled
PSD913F1
23