psd813f1a-90ut STMicroelectronics, psd813f1a-90ut Datasheet - Page 52

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psd813f1a-90ut

Manufacturer Part Number
psd813f1a-90ut
Description
Flash In-system Programmable Isp Peripherals For 8-bit Mcus
Manufacturer
STMicroelectronics
Datasheet
Preliminary
The
PSD913F1
Functional
Blocks
(cont.)
9.4.5 Ports A and B – Functionality and Structure
Ports A and B have similar functionality and structure, as shown in Figure 22. The two ports
can be configured to perform one or more of the following functions:
9.4.4 Port Data Registers
The Port Data Registers, shown in Table 24, are used by the microcontroller to write data
to or read data from the ports. Table 24 shows the register name, the ports having each
register type, and microcontroller access for each register type. The registers are described
below.
9.4.4.1 Data In
Port pins are connected directly to the Data In buffer. In MCU I/O input mode, the pin input
is read through the Data In buffer.
9.4.4.2 Data Out Register
Stores output data written by the MCU in the MCU I/O output mode. The contents of the
Register are driven out to the pins if the Direction Register or the output enable product
term is set to “1”. The contents of the register can also be read back by the microcontroller.
Table 24. Port Data Registers
Data In
Data Out
MCU I/O Mode
GPLD Output – Combinatorial PLD outputs can be connected to Port A or Port B.
PLD Input
Latched Address output – Provide latched address output per Table 19.
Address In – Additional high address inputs, may be latched by ALE.
Open Drain/Slew Rate – pins PA[3:0] and PB[3:0] can be configured to fast slew rate,
Data Port – Port A only, connect to non-multiplexed 8-bit data bus.
Register Name
– Input to the PLDs.
A,B,C,D
A,B,C,D
Port
pins PA[7:4] and PB[7:4] can be configured to Open Drain
Mode.
Read – input on pin
Write/Read
MCU Access
PSD913F1
51

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