hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 17

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only ball. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
17
512-Mbit Double-Data-Rate-Two SDRAM
HY[B/I]18T512[40/80/16]0B2[C/F](L)
Abbreviations for Buffer Type
Abbreviations for Ball Type
Internet Data Sheet
TABLE 8
TABLE 9