hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 46

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

30) A maximum of eight Refresh commands can be posted to any given DDR2 SDRAM, meaning that the maximum absolute interval between
31)
32) When the device is operated with input clock jitter, this parameter needs to be derated by the actual
33) When the device is operated with input clock jitter, this parameter needs to be derated by the actual
34) For these parameters, the DDR2 SDRAM device is characterized and verified to support
35)
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
any Refresh command and the next Refresh command is 9 x
t
(
driving (
calculation is consistent.
deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2–667 SDRAM has
and
+
deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2–667 SDRAM has
and
+
cycles, assuming all input clock jitter specifications are satisfied. For example, the device will support
clock cycles, if all input clock jitter specifications are met. This means: For DDR2–667 5–5–5, of which
t
Tm + 5 is valid even if (Tm + 5 - Tm) is less than 15 ns due to input clock jitter.
t
RPST
t
nRP
WTR
RPST
t
t
JIT.PER.MAX
JIT.DUTY.MAX
t
t
= RU{
is at lease two clocks (2 x
JIT.PER.MAX
JIT.DUTY.MAX
end point and
), or begins driving (
t
RPRE
t
RP
= 1.1 x
) by measuring the signal at two different voltages. The actual voltage measurement points are not critical as long as the
/
= 0.6 x
= + 93 ps, then
t
CK.AVG
= + 93 ps, then
t
t
RPRE
CK.AVG
t
} = 5, i.e. as long as the input clock jitter specifications are met, Precharge command at Tm and Active command at
CK.AVG
t
begin point are not referenced to a specific voltage level but specify when the device output is no longer driving
RPRE
+ 93 ps = + 2843 ps. (Caution on the MIN/MAX usage!).
+ 93 ps = + 1592 ps. (Caution on the MIN/MAX usage!).
t
).
RPRE.MIN(DERATED)
t
t
RPST.MIN(DERATED)
CK
Figure 8
) independent of operation frequency.
shows a method to calculate these points when the device is no longer driving (
=
=
t
RPRE.MIN
t
RPST.MIN
+
+
t
t
JIT.PER.MIN
JIT.DUTY.MIN
t
REFI
46
.
= 0.9 x
= 0.4 x
t
CK.AVG
t
CK.AVG
– 72 ps = + 2178 ps and
512-Mbit Double-Data-Rate-Two SDRAM
– 72 ps = + 928 ps and
t
nPARAM
HY[B/I]18T512[40/80/16]0B2[C/F](L)
= RU{
t
t
JIT.PER
JIT.DUTY
t
t
nRP
RP
t
PARAM
= 15 ns, the device will support
= RU{
of the input clock. (output
t
t
of the input clock. (output
RPRE.MAX(DERATED)
RPST.MAX(DERATED)
/
t
CK.AVG
Internet Data Sheet
t
RP
t
/
t
JIT.DUTY.MIN
JIT.PER.MIN
t
}, which is in clock
CK.AVG
t
RPST
}, which is in
), or begins
=
=
= – 72 ps
= – 72 ps
t
t
RPRE.MAX
RPST.MAX