hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 42

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
3) Inputs are not recognized as valid until
4) The output timing reference voltage level is
5)
6) For products released before 01-09-2007.
7) Products released after 01-09-2007 can support
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Active Time
Row Cycle Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. .
input reference level is the crosspoint when in differential strobe mode. CKDQS RDQS
t
RAS.MAX
is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x
@ CL = 3
@ CL = 4
@ CL = 5
Symbol Min.
t
t
t
t
t
t
t
t
t
CK
CK
CK
RAS
RAS
RC
RC
RCD
RP
V
DDR2–667C
–3
4–4–4
5
3
3
45
40
57
52
12
12
REF
V
stabilizes. During the period before
TT
.
t
RAS.MIN
Max.
8
8
8
70k
70k
—
—
—
—
= 40 ns for all DDR2 speed sort.
DDR2–667D
–3S
5–5–5
Min.
5
3.75
3
45
40
60
55
15
15
42
Max.
8
8
8
70k
70k
—
—
—
—
4–4–4
DDR2–533C
–3.7
Min.
5
3.75
3.75
45
40
60
55
15
15
V
REF
512-Mbit Double-Data-Rate-Two SDRAM
stabilizes, CKE = 0.2 x
Max.
8
8
8
70k
70k
—
—
—
—
HY[B/I]18T512[40/80/16]0B2[C/F](L)
DDR2–400B
–5
3–3–3
Min.
5
5
5
40
40
55
55
15
15
Speed Grade Definition
Max.
8
8
8
70k
70k
—
—
—
—
V
DDQ
Internet Data Sheet
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
TABLE 37
CK
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)6)
1)2)3)4)5)7)
1)2)3)4)6)
1)2)3)4)7)
1)2)3)4)
1)2)3)4)
t
REFI
.