hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 54

• Manufacturer Part Number: hyb18t512160b2fl-5
• Description: 512-mbit Double-data-rate-two Sdram
• Manufacturer: Qimonda

Example: for DDR2-667,
Table 42
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
Symbol
t
t
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK.ABS
CH.ABS
CL.ABS
CK.AVG
JIT.PER
JIT(PER,LCK)
JIT.CC
JIT(CC,LCK)
ERR.2PER
ERR.3PER
ERR.4PER
ERR.5PER
ERR(6-10PER)
ERR(11-50PER)
CH.AVG
CL.AVG
JIT.DUTY
shows clock-jitter specifications.
Parameter
Clock period
Clock high-pulse width
Clock low-pulse width
Parameter
Average clock period nominal w/o jitter
Clock-period jitter
Clock-period jitter during DLL locking period
Cycle-to-cycle clock-period jitter
Cycle-to-cycle clock-period jitter during DLL-locking period
Cumulative error across 2 cycles
Cumulative error across 3 cycles
Cumulative error across 4 cycles
Cumulative error across 5 cycles
Cumulative error across n cycles with n = 6 .. 10, inclusive
Cumulative error across n cycles with n = 11 .. 50, inclusive
Average high-pulse width
Average low-pulse width
Duty-cycle jitter
t
CH.ABS.MIN
= (0.48 x 3000ps) – 125 ps = 1315 ps = 0.438 x 3000 ps.
Min.
t
t
t
CK.AVG(Min)
CH.AVG(Min)
CL.AVG(Min)
x
+
x
t
t
t
CK.AVG(Min)
JIT.PER(Min)
CK.AVG(Min)
54
+
+
t
t
JIT.DUTY(Min)
JIT.DUTY(Min)
Clock-Jitter Specifications for –667, –800
Max.
t
t
t
t
t
CK.AVG(Max)
CH.AVG(Max)
JIT.DUTY(Max)
CL.AVG(Max)
JIT.DUTY(Max)
512-Mbit Double-Data-Rate-Two SDRAM
DDR2 -667
Min.
3000
–125
–100
–250
–200
–175
–225
–250
–250
–350
–450
0.48
0.48
–125
HY[B/I]18T512[40/80/16]0B2[C/F](L)
Absolute Jitter Value Definitions
+
x
x
t
t
Max.
8000
125
100
250
200
175
225
250
250
350
450
0.52
0.52
125
t
CK.AVG(Max)
JIT.PER(Max)
CK.AVG(Max)
DDR2 -800
Min.
2500
–100
–80
–200
–160
–150
–175
–200
–200
–300
–450
0.48
0.48
–100
+
+
Internet Data Sheet
Max.
8000
100
80
200
160
150
175
200
200
300
450
0.52
0.52
100
TABLE 41
TABLE 42
Unit
ps
ps
ps
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
t
t
ps
CK.AVG
CK.AVG