hyb18tc256160af-3.7 Infineon Technologies Corporation, hyb18tc256160af-3.7 Datasheet - Page 73

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hyb18tc256160af-3.7

Manufacturer Part Number
hyb18tc256160af-3.7
Description
Consumer Dram Ddr2
Manufacturer
Infineon Technologies Corporation
Datasheet

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5.2
Table 24
Symbol
V
V
V
V
V
1)
2) The value of
3) Peak to peak ac noise on
4)
Table 25
Parameter / Condition
Termination resistor impedance value for
EMRS(1)[A6,A2] = [0,1]; 75 Ohm
Termination resistor impedance value for
EMRS(1)[A6,A2] =[1,0]; 150 Ohm
Termination resistor impedance value for
EMRS(1)(A6,A2)=[1,1]; 50 Ohm
Deviation of
1)
2) Measurement Definition for
Table 26
Symbol
IIL
IOL
1) All other pins not under test = 0 V
2) DQ’s, LDQS, LDQS, UDQS, UDQS, DQS, DQS, RDQS, RDQS are disabled and ODT is turned off
Data Sheet
DD
DDDL
DDQ
REF
TT
V
is
V
to
respectively. Rtt(eff) = (
delta
Measurement Definition for Rtt(eff): Apply
DDQ
TT
V
is not applied directly to the device.
REF
expected to be about 0.5 ×
V
tracks with
M
, and must track variations in die dc level of
= ((2 x
V
DC Characteristics
Recommended DC Operating Conditions (SSTL_18)
ODT DC Electrical Characteristics
Input and Output Leakage Currents
Parameter / Condition
Input Leakage Current; any input 0 V <
Output Leakage Current; 0 V < VOUT <
Parameter
Supply Voltage
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
M
V
with respect to
REF
V
V
may be selected by the user to provide optimum noise margin in the system. Typically the value of
M
DD
/
,
V
V
DDQ
DDDL
V
IH(ac)
V
) – 1) x 100%
REF
V
tracks with
M
: Turn ODT on and measure voltage (
V
V
may not exceed ± 2%
V
DDQ
DDQ
IL(ac)
of the transmitting device and
/ 2
) /(
V
V
I
(
DD
TT
V
V
IHac
. AC parameters are measured with
is a system supply for signal termination resistors, is expected to be set equal
IH(ac)
Rating
Min.
1.7
1.7
1.7
0.49 ×
V
) –
REF
and
I
(
V
V
– 0.04
V
REF
Symbol
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
delta
V
ILac
V
IL(ac)
DDQ
V
REF
)).
.
V
IN
73
DDQ
to test pin separately, then measure current
V
<
(dc)
M
V
DD
Typ.
1.8
1.8
1.8
0.5 ×
V
REF
V
Min.
60
120
40
–6.00
REF
V
V
M
DDQ
) at test pin (midpoint) with no load:
is expected to track variations in
Nom.
75
150
50
V
Min.
–2
–5
HYB18TC256160AF–[3S/3.7]
DD
Max.
1.9
1.9
1.9
0.51 ×
V
REF
,
AC & DC Operating Conditions
V
DDQ
+ 0.04
256-Mbit DDR2 SDRAM
V
Max.
90
180
60
+ 6.00
DDQ
and
Max.
+2
+5
V
07212005-A7MT-J7NM
DDDL
tied together.
Unit
%
Rev. 1.0, 2005-07
Unit
V
V
V
V
V
I
Unit
µA
µA
(
V
V
IHac
DDQ
) and
.
Note
1)
1)
1)
2)3)
4)
Note
1)
1)
1)
2)
Note
1)
2)
I
(
V
V
ILac
REF
)

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