m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 120

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m5m51016btp

Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Input to the Serial Sound Interface function and the corresponding direction register
Serial Sound Interface function-related pins
Serial Sound Interface function-related register
(3) LSB/MSB first select function
(4) Multiple receive format select function
(5) SCK polarity select function
(6) WS polarity select function
(7) WS delay select function
When inputting an external signal to the Serial Sound Interface, set the corresponding port's direction
register as input.
(1)
(2)
(3)
(4)
Figure 2.6.1 shows a memory map of the frequency synthesizer-related registers. Figures 2.6.2 and
2.6.3 show the configuration of Serial Sound Interface function related-registers, respectively.
Set the port's direction register appropriately and disable the clock synchronous serial and the UART
which share the port.
This function is to choose whether to transmit/receive data from bit 1 or bit 7. This is valid when the
transfer data length is 8 bits long.
Choose either of the following:
If the number of SCKs in a WS high/low period is less than the channel width, the data can be placed
either MSB or LSB justified.
This function selects whether transmit and receive data are synchronized to the rising or falling edge
of WS. This is selected by the SCK polarity bit in the serial sound interface x mode register 1.
This function is to transmit/receive data synchronized to the rising edge or the falling edge of WS.
This is selected by the WS polarity select bit in the Serial Sound Interface x mode register 1.
Either of the following modes may be selected for the channel change timing:
• LSB first
• MSB first
• Normal WS mode
• Delayed WS mode
WS transitions one SCK period before a channel change. (The channel changes one SCK period
after WS transitions.)
WS transitions concurrently with a channel change.
SCLK
WS
RX
XMIT
0
0
and RX
and WS
0
0
and XMIT
and SCLK
page 111 of 354
1
Data is transmitted/received from bit 0.
Data is transmitted/received from bit 7.
1
pins
pins
1
1
pins
pins
Transfer clock input
Channel clock input
Data input
Data output
2. Serial sound interface

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